71M6533G Maxim, 71M6533G Datasheet - Page 75
71M6533G
Manufacturer Part Number
71M6533G
Description
The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6533.pdf
(132 pages)
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For a production meter, the RESET pin should be protected by the by the external components shown in
Figure
4.7 Connecting the V1 Pin
A voltage divider should be used to establish that V1 is in a safe range when the meter is in MISSION
mode (see
timer enabled. The resistor divider ratio must be chosen so that V1 crosses the VBIAS threshold when
V3P3 is near the minimum supply voltage (3.0 VDC). A series resistor (R3) provides additional hysteresis,
and a capacitor to ground (C1) is added for enhanced EMC immunity.
The amount of hysteresis depends on the choice of R1 and R3: If V1 < VBIAS, approximately 1 µA will
flow into the on-chip V1 comparator causing a voltage drop. If V1 ≥ VBIAS, almost no current will flow
into the comparator. The voltage drop will require V3P3 to be slightly higher for V1 to cross the VBIAS
threshold when V3P3 is rising as compared to when V3P3 is falling. Maintaining sufficient hysteresis
helps to eliminate rapid mode changes which may occur in cases where the power supply is unstable with
V1 close to the VBIAS threshold point.
4.8
Even though a functional meter will not necessarily need a reset switch, it is useful to have a reset push-
button for prototyping as shown in
(functional in MISSION mode only), V3P3D (MISSION and BROWNOUT modes), or VBAT (all modes, if
a battery is present), or from a combination of these sources, depending on the application.
Rev 2
Since the 71M6533 and 71M6534 generates its own power-on reset, a reset button or circuitry, as
shown in
42, right side. R1 should be in the range of 100 Ω and mounted as closely as possible to the IC.
Connecting the Reset Pin
Figure
Figure
41). V1 must be lower than 2.9 V in all cases in order to keep the hardware watchdog
71M6533/71M6534
42, is only required for test units and prototypes.
GND
V3P3
Figure 40: Connection for Optical Components
OPT_RX
OPT_TX
Figure
Figure 41: Voltage Divider for V1
16.9kΩ
42, left side. The RESET signal may be sourced from V3P3SYS
100 pF
R
1
R
2
10 kΩ
R
20kΩ
2
R
V3P3SYS
R
LED
3
100pF
Phototransistor
1
C
1
V3P3SYS
V1
75
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