71M6533G Maxim, 71M6533G Datasheet - Page 23
71M6533G
Manufacturer Part Number
71M6533G
Description
The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6533.pdf
(132 pages)
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to hold temporary data.
Accumulator (ACC, A, SFR 0xE0):
ACC is the accumulator register. Most instructions use the accumulator to hold the operand. The
mnemonics for accumulator-specific instructions refer to accumulator as A, not ACC.
B Register (SFR 0xF0):
The B register is used during multiply and divide instructions. It can also be used as a scratch-pad register
Program Status Word (PSW, SFR 0xD0)):
This register contains various flags and control bits for the selection of the register banks (see
Rev 2
IEN0
IP0
S0RELL
P3
IEN1
IP1
S0RELH
S1RELH
PDATA
IRCON
T2CON
PSW
WDCON
A
B
PSW Bit
Name
7
6
5
4
3
2
1
0
0xA8
0xA9
0xAA
0xB0
0xB8
0xB9
0xBA
0xBB
0xBF
0xC0
0xC8
0xD0
0xD8
0xE0
0xF0
Address
Symbol
(Hex)
RS1
RS0
OV
CV
AC
F0
–
P
0x00
0x00
0xD9
0xFF
0x00
0x00
0x03
0x03
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Reset value
Function
Carry flag.
Auxiliary Carry flag for BCD operations.
General purpose Flag 0 available for user.
Register bank select control bits. The contents of RS1 and RS0 select the
working register bank:
Overflow flag.
User defined flag.
Parity flag, affected by hardware to indicate odd or even number of one bits in
the Accumulator, i.e. even parity.
(Hex)
Table 11: PSW Bit Functions (SFR 0xD0)
F0 is not to be confused with the F0 flag in the CESTATUS register.
RS1/RS0
00
01
10
11
Description
Port 3
Interrupt Enable Register 0
Interrupt Priority Register 0
Serial Port 0, Reload Register, low byte
Interrupt Enable Register 1
Interrupt Priority Register 1
Serial Port 0, Reload Register, high byte
Serial Port 1, Reload Register, high byte
High address byte for MOVX@Ri - also called USR2
Interrupt Request Control Register
Polarity for INT2 and INT3
Program Status Word
Baud Rate Control Register (only WDCON[7] bit used)
Accumulator
B Register
Bank selected
Bank 0
Bank 1
Bank 2
Bank 3
0x00 – 0x07
0x08 – 0x0F
0x10 – 0x17
0x18 – 0x1F
Location
Table
Page
31
34
26
24
31
34
26
26
20
32
32
23
26
23
23
11).
23
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