TMPM380FWFG Toshiba, TMPM380FWFG Datasheet - Page 28

• Manufacturer Part Number: TMPM380FWFG
• Manufacturer: Toshiba

Specifications of TMPM380FWFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 128K
• Rom Type: Flash
• Ram (kbytes): 12K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 2
• I2c/sio (ch): 2
• Uart/sio (ch): 5
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 18
• 16-bit Timer / Counter: 8
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

5
Memory Map
map. The internal ROM, internal RAM and internal I/O of the TMPM380 are mapped to the code,
SRAM and peripheral regions of the Cortex-M3 respectively. The SRAM and internal I/O regions are
all included in the bit-band region.
or a hard fault if memory faults are disabled. Do not access the vendor-specific region.
The memory maps for the TMPM380 are based on the ARM Cortex-M3 processor core memory
The CPU register region is the processor core’s internal register region.
For more information on each region, see the “Cortex-M3 Technical Reference Manual”.
Note that access to regions indicated as “Fault” causes a memory fault if memory faults are enabled
See “Special Function Registers” for details on the internal I/O region.
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TMPM380/M382