TMPM380FWFG Toshiba, TMPM380FWFG Datasheet - Page 410
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TMPM380FWFG
Manufacturer Part Number
TMPM380FWFG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM380FWDFG.pdf
(700 pages)
Specifications of TMPM380FWFG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
128K
Rom Type
Flash
Ram (kbytes)
12K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
2
I2c/sio (ch)
2
Uart/sio (ch)
5
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
18
16-bit Timer / Counter
8
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM380FWFG
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
- Current page: 410 of 700
- Download datasheet (5Mb)
Note1)
Note2)
(b) SPI
The SPI interface has 4 lines. SP0FSS is used for slave selection. One of the main features
of the SPI format is that the <SPO> and <SPH> bits in the SSP0CR0 control register can be
used to set the SP0CLK operation timing.
SSP0CR0<SPO>
SSP0CR0<SPH>
SPI frame format (single transfer, <SPO>=0 & <SPH>=0)
SP0FSS
SP0CLK
SP0DO
SP0DI
SSP0CR0<SPO> is used to set the level at which SP0CLK in idle state is held.
<SPO>=1: Sets SP0CLK in High state
<SPO>=0: Sets SP0CLK in Low state
SSP0CR0<SPH> is used to select the clock edge at which data is latched.
SSP0CR0<SPH>=0: Captures data at the 1st clock edge.
SSP0CR0<SPH>=1: Captures data at the 2nd clock edge.
When transmission is disable , SP0DO terminal doesn’t output and is high impedance status. This
terminal needs to add suitable pull-up/down resistance to valid the voltage level.
SP0DI terminal is always input and internal gate is open. In case of transmission signal will be high
impedance status, this terminal needs to add suitable pull-up/down resistance to valid the voltage level.
Hi-Z(Note1)
Hi-Z(Note2)
TMPM380/M382 - 9 / 28 -
MSB
MSB
LSB
LSB
Hi-Z(Note2)
Hi-Z(Note1)
TMPM380/M382
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