TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 59
TX4939XBG-400
Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet
1.TX4939XBG-400.pdf
(740 pages)
Specifications of TX4939XBG-400
Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456
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National Conventions Used in This Manual
National Conventions Used in This Manual
Rev. 3.1 November 1, 2005
Numeric Conventions
Data Conventions
Signal Conventions
Register Conventions
•
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•
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Hexadecimal values are expressed as follows (example shown for decimal number 42):
0x2A
KB (kilobyte) = 1,024 bytes
MB (megabyte) = 1,024 × 1,024 = 1,048,576 bytes
GB (gigabyte) = 1,024 × 1,024 × 1,024 = 1,073,741,824 bytes
Byte: 8 bits
Halfword: 2 consecutive bytes (16 bits)
Word: 4 consecutive bytes (32 bits)
Doubleword: 8 consecutive bytes (64 bits)
Active-low signals are indicated by adding an asterisk (*) at the end of the signal name. (Example:
RESET*)
A signal is “asserted” when it is driven to the active voltage level. A signal is “deasserted” when it is
driven to an inactive voltage level.
Properties of each bit in a register are expressed as follows.
R:
W:
W1C
R/W:
R/W1C: Read/Write 1 Clear. The bit is both readable and writeable.
R/W1S Read/Write 1 Set. The bit is both readable and writeable.
R/W0C: Read/Write 0 Clear. The bit is both readable and writeable.
RS/WC Read Set/Write Clear. The bit is both readable and writeable. The bit is set
R/L:
The notation <register name>.<bit/field name> is used to indicate a specific bit/field of a register.
CCFG.TOE refers to the Timeout Enable for Bus Error (TOE) field, located at bit 14 of the Chip
Configuration Register (CCFG).
Example: CCFG.TOE
Read-only. Software cannot change the bit value.
Write-only. The value of the bit is undefined if read.
Write 1 Clear. A write of 1 clears the bit, and a write of 0 has no effect.
Read/Write
A write of 1 clears the bit, and a write of 0 has no effect.
A write of 1 sets the bit, and a write of 0 has no effect.
A write of 0 clears the bit, and a write of 1 has no effect.
when read, and a write of an arbitrary value to the bit clears it.
Read/Load. The value of this bit can only be changed through PCI configuration space
programming, as described in Section 10.3.14, “Programming PCI Configuration
Space Registers.”
i
Toshiba RISC Processor
TX4939
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