FAN6982 Fairchild Semiconductor, FAN6982 Datasheet - Page 12

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FAN6982

Manufacturer Part Number
FAN6982
Description
The FAN6982 is a 14-pin, Continuous Conduction Mode (CCM) PFC controller IC intended for Power Factor Correction (PFC) pre-regulators
Manufacturer
Fairchild Semiconductor
Datasheet

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Part Number:
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Manufacturer:
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Part Number:
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© 2009 Fairchild Semiconductor Corporation
FAN6982 • Rev. 1.0.3
Functional Description
Oscillator
The internal oscillator frequency of FAN6982 is
determined by the timing resistor and capacitor on the
RT/CT pin, but note that the optimum operation for
FAN6982 is between 50 and 75kHz. The frequency of
the internal oscillator is given by:
The dead time for the PFC gate drive signal is
determined by
The dead time should be smaller than 2% of switching
period to minimize line current distortion around line
zero crossing.
Gain Modulator
Gain modulator is the key block for PFC stage because
it provides the reference to the current control error
amplifier for the input current shaping, as shown in
Figure 23. The output current of gain modulator is a
function of V
modulator is given as a ratio between I
given V
inversely proportional to V
to implement line feed-forward. This automatically
adjusts the reference of current control error amplifier
according to the line voltage such that the input power
of PFC converter is not changed with line voltage, as
shown in, Figure 25.
t
f
DEAD
OSC
=
=
0.56
360
RMS
Figure 23. Gain Modulator Block
C
when V
T
R C
EA
T
, I
1
AC
T
EA
+
and V
360
is saturated to high. The gain is
C
RMS
T
RMS
2
, as shown in Figure 24,
. The gain of the gain
I
MO
=
=
MO
G I
I
AC
AC
and I
V
RMS
K V
2
(
(
V
AC
EA
EA
MAX
with a
0.6)
(2)
(1)
0.6)
12
To sense the RMS value of the line voltage, an
averaging circuit with two poles is typically employed as
shown in Figure 23. Notice that the input voltage of
PFC is clamped at the peak of the line voltage once
PFC stops switching since the junction capacitance of
bridge diode is not discharged, as shown in Figure 26.
Therefore, the voltage divider for V
designed considering the brownout protection trip point
and minimum operation line voltage.
Figure 26. V
Figure 24. Modulation Gain Characteristics
V
Figure 25. Line Feed-Forward Operation
RMS
V
I
V
IN
L
V
EA
IN
G
V
RMS-UVP
PFC runs
V
RMS
RMS
1
According to the PFC Operation
2
PFC stops
RMS
V
RMS
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should be

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