FAN7930B Fairchild Semiconductor, FAN7930B Datasheet - Page 11

• Manufacturer Part Number: FAN7930B
• Description: The FAN7930B is an active power factor correction (PFC) controller for boost PFC applications that operate in critical conduction mode (CRM)
• Manufacturer: Fairchild Semiconductor

© 2010 Fairchild Semiconductor Corporation
FAN7930B • Rev. 1.0.2
Applications Information
1. Startup: Normally, supply voltage (V
block is fed from the additional power supply, which can
be called standby power. Without this standby power,
auxiliary winding to detect zero current detection can be
used as a supply source. Once the supply voltage of the
PFC block exceeds 12V, internal operation is enabled
until the voltage drops to 8.5V. If V
current is sinking from V
2. INV Block: Scaled-down voltage from the output is
the input for the INV pin. Many functions are embedded
based on the INV pin: transconductance amplifier,
output OVP comparator and disable comparator.
For the output voltage control, a transconductance
amplifier is used instead of the conventional voltage
amplifier. The transconductance amplifier (voltage-
controlled current source) aids the implementation of
OVP and disables function. The output current of the
amplifier changes according to the voltage difference of
the inverting and non-inverting input of the amplifier. To
cancel down the line input voltage effect on power factor
correction, effective control response of PFC block
should be slower than the line frequency and these
conflicts with the transient response of controller. Two-
pole one-zero type compensation may be used to meet
both requirements.
The OVP comparator shuts down the output drive block
when the voltage of the INV pin is higher than 2.675V
and there is 0.175V hysteresis. The disable comparator
disables the operation when the voltage of the inverting
input is lower than 0.35V and there is 100mV hysteresis.
An external small-signal MOSFET can be used to
disable the IC. The IC operating current decreases to
reduce power consumption if the IC is disabled. 0 is the
timing chart of the internal circuit near the INV pin when
rated PFC output voltage is assumed at 390V
supply voltage is 15V.
Figure 22.
CC
.
Startup Circuit
CC
exceeds V
CC
) of a PFC
DC
Z
and V
, 20mA
CC
11
3.
embedded by the information at the INV pin. That
information comes from the output through the voltage
dividing resistors. To scale down from high voltage to
low one, high resistance normally used with low
resistance. In cases the resistor of high resistance get a
damage and resistance is changed to high, though INV
pin information is normal output voltage exceeds its
rated output. Once this happen, output electrolytic
capacitor may be exploded. To prevent such a
catastrophe additional OVP pin is assigned to double
check output voltage. Thus additional OVP may be
called 2
OVP.
OVP
Figure 24.
nd
Figure 23.
OVP while INV pin OVP can be called 1
Pin: Over-Voltage Protection (OVP) is
Timing Chart for INV Block
Circuit Around INV Pin
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