SG6901 Fairchild Semiconductor, SG6901 Datasheet
SG6901
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SG6901 Summary of contents
Page 1
... For PFC stage, the proprietary multi-vector control scheme provides a fast transient response in a low- bandwidth PFC loop, in which the overshoot and undershoot of the PFC voltage are clamped. If the feedback loop is broken, the SG6901A shuts off PFC to prevent extra-high voltage on output. For the ...
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... Application Circuit © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 Figure 1. Typical Application 2 www.fairchildsemi.com ...
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... Block Diagram © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 Figure 2. Block Diagram 3 www.fairchildsemi.com ...
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... Marking Information Pin Configuration © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 T- S=SOP P- Z=Lead Free Null=regular package XXXXXXXX- Wafer Lot Y: Year; WW: Week V: Assembly Location Figure 3. Top Mark Figure 4. Pin Configuration 4 www.fairchildsemi.com ...
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... The impedance of the NTC thermistor 3 OTP decreases whenever the temperature increases. Once the voltage of the OTP pin drops below the OTP threshold, the SG6901A is disabled. PFC current amplifier output. The signal from this pin is compared with an internal sawtooth 4 IEA to determine the pulse width for PFC gate drive ...
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... Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol T Operating Ambient Temperature A © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 Parameter < 50℃ A Human Body Model, JESD22-A114 Machine Model, JESD22-A115 Parameter 6 Min ...
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... Threshold for RANGE RMS-L RMS Comparator t Range-Enable Delay Time RANGE V Output Low Voltage of RANGE Pin OL I Output High Leakage Current of OH RANGE Pin © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 Conditions 0V < V < DD-ON V =15V; OPFC, DD OPWM Open; R OVP DD R =24KΩ > ...
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... Unit Gain Bandwidth CMRR Common Mode Rejection Ratio V Output High Voltage OUT-HIGH V Output Low Voltage OUT-LOW Reference Current Source MR1 MR2 I Maximum Source Current L I Maximum Sink Current H © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 Conditions Min. Typ. 2.95 3.00 60 110 3.20 3. 3.10 3.15 0.5 2.75 2.85 6.5 1.5 2 ...
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... FB FB PWM Open-Loop Protection Voltage OPEN-LOOP PWM Open-Loop Protection Delay t OPEN-PWM Time t Interval of PWM Open-Loop OPEN-PWM- Protection Reset Hiccup © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 Conditions R =24KΩ =1.05V RMS SENSE V =3V RMS Multiplier Linear Range R =24KΩ ...
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... OTP-ON V OTP Threshold Voltage OTP-OFF t OTP Debounce Time OTP SOFT START SECTION Constant Current Output I SS for Soft-Start R Discharge R D DSON © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 Conditions Min. V =15V, OPWM<= RANGE=Open 0.65 RANGE=Ground 0.60 270 =△ /T) △V S SLOPE ...
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... Temperature (°C) Figure 7. Operating Current Start Threshold Voltage (V 13.0 12.6 12.2 11.8 11.4 11.0 -40 -25 - Temperature (°C) Figure 9. V Turn-On Threshold Voltage DD © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 ) vs. Temperature 11.0 10.6 10.2 9.8 9.4 9 110 125 Figure vs. Temperature ...
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... Temperature (°C) Figure 13. Low V Threshold for RANGE Comparator RMS PFC Over-Voltage Protection (OVP 3.30 3.28 3.26 3.24 3.22 3.20 -40 -25 - Temperature (°C) Figure 15. PFC OVP Threshold Voltage © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 ) vs. Temperature RMS-H 3.05 3.03 3.01 2.99 2.97 2. 110 125 - RMS-L 120 104 88 ...
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... Temperature F-PWM 110 -40 -25 - Temperature (°C) Figure 21. OPWM Falling Time © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 ) vs. Temperature Peak Current Limit Threshold Voltage 1 (V MAX 0.75 0.73 0.71 0.69 0.67 0.65 - 110 125 Figure 18. Peak Current Limit Threshold Voltage ) vs ...
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... Typical Performance Characteristics OTP Threshold Voltage (V 1.25 1.23 1.21 1.19 1.17 1.15 -40 -25 - Temperature (°C) Figure 23. V OTPurn Threshold Voltage DD © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 ) vs. Temperature OTP-OFF 110 125 14 www.fairchildsemi.com ...
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... VRMS pin. The VRMS voltage is used for the PFC multiplier, brownout protection, and range control. For brownout protection, SG6901A is disabled with a 195ms delay if the voltage VRMS drops below 0.8V. For PFC multiplier and range control, refer to the PFC Operation section below for details ...
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... OVPPFC. voltage, the Cycle-by-Cycle Current Limiting SG6901A provides cycle-by-cycle current limiting for both PFC and PWM stages. Figure 28 shows the peak current limit for the PFC stage. The PFC gate drive is terminated once the voltage on the ISENSE pin goes ...
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... FBPWM is clamped by the SS voltage during startup. In the event of a protected condition and/or PWM is disabled, the SS pin quickly discharges. Gate Driver SG6901A output stage is a fast totem-pole gate driver. The output driver is clamped by an internal 18V Zener diode to protect the external power MOSFET. 17 ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 13.00 12.60 A 11.43 ...
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... Fairchild Semiconductor Corporation SG6901A • Rev. 1.0.2 19 www.fairchildsemi.com ...