FAN302UL Fairchild Semiconductor, FAN302UL Datasheet - Page 10

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FAN302UL

Manufacturer Part Number
FAN302UL
Description
This highly integrated PWM controller provides several features to enhance the performance of flyback converters
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2011 Fairchild Semiconductor Corporation
FAN302UL • Rev. 1.0.2
Operational Description
Basic Control Principle
Figure 24 shows the internal PWM control circuit. The
Constant Voltage (CV) regulation is implemented in the
same way as in a conventional isolated power supply,
where the output voltage is sensed using a voltage
divider and compared with the internal 2.5V reference of
shut regulator (KA431) to generate a compensation
signal. The compensation signal is transferred to the
primary side using an opto-coupler and scaled down
through an attenuator, Av, generating V
the error signal V
(PWM.V) to determine the duty cycle.
Meanwhile, CC regulation is implemented internally
without directly sensing output current. The output
current estimator reconstructs output current data (V
using the transformer primary-side current and diode
current discharge time. Then V
reference voltage (2.5V) by an internal error amplifier,
generating a V
The two error signals, V
an internal sawtooth waveform (V
comparators PWM.I and PWM.V, respectively, to
determine the duty cycle. Figure 24 shows the outputs
of two comparators (PWM.I and PWM.V) combined with
OR gate and used as a reset signal of flip-flop to
determine the MOSFET turn-off instant. Of V
V
shown in Figure 25. During CV regulation, V
determines the duty cycle while V
HIGH. During CC regulation mode, V
duty cycle while V
EA.I
, the lower signal determines the duty cycle, as
Figure 24. Internal PWM Control Circuit
EA.I
EA.V
signal to determine duty cycle.
EA.V
is applied to the PWM comparator
is saturated to HIGH.
EA.I
and V
CCR
EA.V
is compared with a
, are compared with
EA.I
EA.I
EA.V
SAW
is saturated to
determines the
) by PWM
signal. Then,
EA.V
CCR
and
EA.V
)
10
Output Current Estimation
Figure 26 shows the key waveform of a flyback
converter operating in Discontinuous Conduction Mode
(DCM), where the secondary-side diode current reaches
zero before the next switching cycle begins. Since the
output current estimator is designed for DCM operation,
the power stage should be designed such that DCM is
guaranteed for the entire operating range. The output
current is obtained by averaging the triangular output
diode current area over a switching cycle as:
OSC CLK
PWM.V
V
Gate
PWM.I
where I
current; N
transformer primary side and secondary side,
respectively; t
and t
I
SAW
O
Figure 26. Key Waveforms of DCM Flyback
Figure 25.PWM Operation for CC and CV

S
is the switching period.
I
PK
CV Regulation
D
P
is the peak value of the primary-side
AVG
and N
V
DIS
V
EA.I
EA.V
is the diode current discharge time;
I
I
Converter
S
PK
P K
I
PK
are the number of turns of
N
N
N
P
S
N
P
S
T
2
DIS
T
CC Regulation
S
V
V
I
www.fairchildsemi.com
EA.V
EA.I
D
AVG
I
(1)
O

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