FSD146MRBN Fairchild Semiconductor, FSD146MRBN Datasheet - Page 9

• Manufacturer Part Number: FSD146MRBN
• Description: The FSD146MRBN is an integrated Pulse Width Modulation (PWM) controller and SenseFET designed for offline Switch-Mode Power Supplies (SMPS) with minimal external components
• Manufacturer: Fairchild Semiconductor

© 2011 Fairchild Semiconductor Corporation
FSD146MRBN • Rev. 1.0.0
Functional Description
1. Startup: At startup, an internal high-voltage current
source supplies the internal bias and charges the
external capacitor (C
illustrated in Figure 17. When V
FSD146MRBN begins switching and the internal high-
voltage current source is disabled. The FSD146MRBN
continues normal switching operation and the power is
supplied from the auxiliary transformer winding unless
V
2. Soft-Start: The FSD146MRBN has an internal soft-
start circuit that increases PWM comparator inverting
input voltage, together with the SenseFET current,
slowly after it starts. The typical soft-start time is 15ms.
The pulse width to the power switching device is
progressively increased to establish the correct working
conditions for transformers, inductors, and capacitors.
The voltage on the output capacitors is progressively
increased to smoothly establish the required output
voltage. This helps prevent transformer saturation and
reduces stress on the secondary diode during startup.
CC
goes below the stop voltage of 7.5V.
Figure 17. Startup Block
Vcc
) connected to the V
CC
Figure 18. Pulse Width Modulation Circuit
reaches 12V, the
CC
pin, as
9
3. Feedback Control: This device employs current-
mode control, as shown in Figure 18. An opto-coupler
(such as the FOD817) and shunt regulator (such as the
KA431) are typically used to implement the feedback
network. Comparing the feedback voltage with the
voltage across the R
control the switching duty cycle. When the reference pin
voltage of the shunt regulator exceeds the internal
reference voltage of 2.5V, the opto-coupler LED current
increases, pulling down the feedback voltage and
reducing drain current. This typically occurs when the
input voltage is increased or the output load is decreased.
3.1 Pulse-by-Pulse Current Limit: Because current-
mode control is employed, the peak current through
the SenseFET is limited by the inverting input of the
PWM comparator (V
Assuming that the 90μA current source flows only
through the internal resistor (3R + R =27kΩ), the
cathode voltage of diode D2 is about 2.5V. Since D1
is blocked when the feedback voltage (V
2.5V, the maximum voltage of the cathode of D2 is
clamped at this voltage. Therefore, the peak value of
the current through the SenseFET is limited.
3.2 Leading-Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, a high-current spike
usually occurs through the SenseFET, caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. Excessive voltage across the R
resistor leads to incorrect feedback operation in the
current-mode PWM control. To counter this effect, the
FSD146MRBN employs a leading-edge blanking
(LEB) circuit. This circuit inhibits the PWM comparator
for t
LEB
(300ns) after the SenseFET is turned on.
SENSE
FB
*), as shown in Figure 18.
resistor makes it possible to
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FB
) exceeds
SENSE