FSL206MRBN Fairchild Semiconductor, FSL206MRBN Datasheet

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FSL206MRBN

Manufacturer Part Number
FSL206MRBN
Description
The FSL206MRBN integrated Pulse-Width Modulator (PWM) and SenseFET is specifically designed for high-performance offline Switched-Mode Power Supplies (SMPS) with minimal external components
Manufacturer
Fairchild Semiconductor
Datasheet
© 2011 Fairchild Semiconductor Corporation
FSL206MRBN • Rev. 1.0.1
FSL206MRBN
Green Mode Fairchild Power Switch (FPS™)
Features
Applications
Related Resources
Ordering Information
Notes:
1.
2.
3.
FSL206MRBN
Number
Internal Avalanche-Rugged SenseFET: 650V
Precision Fixed Operating Frequency: 67kHz
No-Load <150mW at 265V
Winding; <30mW with Bias Winding
No Need for Auxiliary Bias Winding
Frequency Modulation for Attenuating EMI
Line Under-Voltage Protection (LUVP)
Pulse-by-Pulse Current Limiting
Low Under-Voltage Lockout (UVLO)
Ultra-Low Operating Current: 300µA
Built-In Soft-Start and Startup Circuit
Various Protections: Overload Protection (OLP),
Over-Voltage Protection (OVP), Thermal Shutdown
(TSD), Abnormal Over-Current Protection
(AOCP)Auto-Restart Mode for All Protections
SMPS for STB, DVD, and DVCD Player
SMPS for Auxiliary Power
Fairchild Power Supply WebDesigner — Flyback Design & Simulation - In Minutes at No Expense
AN-4137 — Design Guidelines for Offline Flyback Converters Using FPS™
AN-4141 — Troubleshooting and Design Tips for Fairchild Power Switch (FPS™) Flyback Applications
AN-4147 — Design Guidelines for RCD Snubber of Flyback
AN-4150 — Design Guidelines for Flyback Converters Using FSQ-Series Fairchild Power Switch (FPS™)
The junction temperature can limit the maximum output power.
230V
Maximum practical continuous power in an open-frame design at 50°C ambient.
Part
AC
or 100/115V
Temperature
-40 ~ 115°C
Operating
AC
with doubler. The maximum power with CCM operation.
AC
without Bias
L206MRB
Mark
Top
8-DIP
PKG
Packing
Method
Description
The FSL206MRBN integrated Pulse-Width Modulator
(PWM) and SenseFET is specifically designed for high-
performance offline Switched-Mode Power Supplies
(SMPS) with minimal external components. This device
integrates high-voltage power regulators that combine
an avalanche-rugged SenseFET with a Current-Mode
PWM control block.
The integrated PWM controller includes: 7.8V regulator
for no bias winding, Under-Voltage Lockout (UVLO)
protection, Leading-Edge Blanking (LEB), an optimized
gate turn-on/turn-off driver, EMI attenuator, Thermal
Shutdown (TSD) protection, temperature-compensated
precision current sources for loop compensation, and
fault-protection circuitry such as Overload Protection
(OLP), Over-Voltage Protection (OVP), Abnormal Over-
Current Protection (AOCP), and Line Under-Voltage
Protection (LUVP). During startup, the FSL206MRBN
offers good soft-start performance.
The internal high-voltage startup switch and the Burst-
Mode operation with very low operating current reduce
the power loss in Standby Mode. As a result, it is
possible to reach power loss of 150mW with no-bias
winding and 30mW with bias winding at no-load
condition when the input voltage is 265V
Rail
Current
Limit
0.6A
R
Output Power Table
DS(ON),MAX
19Ω
Frame
±15%
230V
Open
12W
AC
(2)
AC
(3)
January 2012
.
(1)
www.fairchildsemi.com
Frame
265V
Open
85 ~
7W
AC
(3)

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FSL206MRBN Summary of contents

Page 1

... Overload Protection (OLP), Over-Voltage Protection (OVP), Abnormal Over- Current Protection (AOCP), and Line Under-Voltage Protection (LUVP). During startup, the FSL206MRBN offers good soft-start performance. The internal high-voltage startup switch and the Burst- Mode operation with very low operating current reduce the power loss in Standby Mode ...

Page 2

... Application Diagram Drain STR LS PWM V V GND FB CC (a) With Bias Winding Internal Block Diagram © 2011 Fairchild Semiconductor Corporation FSL206MRBN • Rev. 1.0 OUT LS Figure 22. Typical Application Figure 23. Internal Block Diagram 2 V Drain STR PWM V V GND FB CC (b) Without Bias Winding www ...

Page 3

... Drain. Designed to connect directly to the primary lead of the transformer and capable Drain switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance. © 2011 Fairchild Semiconductor Corporation FSL206MRBN • Rev. 1.0.1 GND Drain V Drain CC ...

Page 4

... A Symbol θ Junction-to-Ambient Thermal Impedance JA Notes: 7. JEDEC recommended environment, JESD51-2, bv and test board, JESD51-10, with minimum land pattern. © 2011 Fairchild Semiconductor Corporation FSL206MRBN • Rev. 1.0.1 = 25°C unless otherwise specified. A Parameter (5) (6) < 100μA). After shutdown, before V CLAMP_MAX Parameter (7) 4 Min ...

Page 5

... V Over-Voltage Protection OVP V Line-Sense Protection On to Off LS_OFF V Line-Sense Protection Off to On LS_ON TSD Thermal Shutdown Temperature HYS TSD Hysteresis Temperature TSD © 2011 Fairchild Semiconductor Corporation FSL206MRBN • Rev. 1.0.1 Condition 250µ 650V 520V 0V ...

Page 6

... Startup Charging Current CH I Startup Current START V Minimum V Supply Voltage STR STR Notes: 8. Though guaranteed by design, not 100% tested in production. 9. Pulse test: pulse width=300ms, duty cycle=2%. © 2011 Fairchild Semiconductor Corporation FSL206MRBN • Rev. 1.0.1 (Continued) Conditions 40V FB STR V = 15V, 0V<V < 8V, 0V<V <V ...

Page 7

... Figure 27. Start Threshold Voltage vs. Temperature Feedback Source Current (I 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 ‐40℃ ‐25℃ 0℃ 25℃ Figure 29. Feedback Source Current vs. Temperature © 2011 Fairchild Semiconductor Corporation FSL206MRBN • Rev. 1.0.1 ) OSC 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 ‐ 110 115 Figure 26. HV Regulator Voltage vs. Temperature ) START 1 ...

Page 8

... Figure 33. Operating Supply Current 2 vs. Temperature Suntdown Delay Current (I 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 ‐40℃ ‐25℃ 0℃ 25℃ Figure 35. Shutdown Delay Current vs. Temperature © 2011 Fairchild Semiconductor Corporation FSL206MRBN • Rev. 1.0.1 (Continued 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 ‐40℃ 110 Figure 32. Operating Supply Current 1 1 ...

Page 9

... At startup, an internal high-voltage current source supplies the internal bias and charges the external capacitor (C ) connected to the V A Figure 36. An internal high-voltage regulator (HV REG) located between the V and V STR V to 7.8V and supplies operating current. Therefore, CC FSL206MRBN needs no auxiliary bias winding. V DC,link 7. START ...

Page 10

... C 2. with 2.7µA current source. Figure 40. Overload Protection (OLP) © 2011 Fairchild Semiconductor Corporation FSL206MRBN • Rev. 1.0.1 Figure 41. Abnormal Over-Current Protection Abnormal Over-Current Protection (AOCP) When the secondary rectifier diodes or the transformer pin are shorted, a steep current with extremely high di/dt can flow through the SenseFET during the LEB time ...

Page 11

... If the input voltage is low, the converter should be protected. In the FSL206MRBN, the LUVP circuit senses the input voltage using the LS pin and, if this voltage is lower than 1.5V, the LUVP signal is generated. The comparator has 0 ...

Page 12

... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2011 Fairchild Semiconductor Corporation FSL206MRBN • Rev. 1.0.1 6.67 6.096 3.683 3.20 3 ...

Page 13

... Fairchild Semiconductor Corporation FSL206MRBN • Rev. 1.0.1 13 www.fairchildsemi.com ...

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