FAN7631 Fairchild Semiconductor, FAN7631 Datasheet - Page 11

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FAN7631

Manufacturer Part Number
FAN7631
Description
The FAN7631 is a pulse-frequency modulation controller for high-efficiency half-bridge resonant converters that includes a high-side gate drive circuit, an accurate current-controlled oscillator, and various protection functions
Manufacturer
Fairchild Semiconductor
Datasheet

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© 2011 Fairchild Semiconductor Corporation
FAN7631 • 1.0.2
Functional Description
1. Internal Oscillator
Figure 29 shows the simplified circuit of internal current-
controlled oscillator and typical circuit configuration for
the RT pin. Internally, the voltage on the RT pin is
regulated at 2V by the V/I converter. The charging /
discharging current for the oscillator capacitor, C
obtained by mirroring the current flowing out of the RT
pin (I
and V
outputs, the clock signal is obtained. Thus, the switching
frequency increases as the RT pin current increases.
As can be seen in Figure 29, an opto-coupler transistor is
typically connected to the RT pin through R
modulate the switching frequency. During an overload
condition, the opto-coupler is fully turned off and I
solely determined by R
frequency. Meanwhile, the maximum switching frequency
is obtained when the opto-coupler is fully turned on.
Considering the typical saturation voltage of opto-
transistor (0.2V), the maximum frequency can be
obtained by R
2. Gate Driver and Dead Time Programming
The FAN7631 employs a gate drive circuit with high
driving capability (source: 0.5A / sink: 1A) to cover a wide
variety of applications. The two gate drive signals (LO
and HO) are complimentary; each signal has 50% duty
cycle, including the dead time, as shown in Figure 30.
The dead time can be programmed by the resistor, R
as shown in Figure 31. Internally, the voltage on the DT
pin is regulated at 1.4V by the V/I converter and I
programs the dead time using R
immunity of the dead time circuit, a sample-and-hold
circuit is internally employed. However, severe noises in
a high-power application can affect the dead time circuit
operation and it is therefore recommended to use a
bypass capacitor of around 10nF in parallel with the R
As a protective measure against abnormal conditions,
f
f
min
max
CTC
TL
Figure 29. Current-Controlled Oscillator
). By comparing the capacitor voltage with V
11.6
and driving S/R flip-flop with the comparator
(
11.6
R
R
min
max
k
min
k
and R
50
10.4
kHz
R
min
max
min
k
as:
, which sets the minimum
) 50
DT
. To improve the noise
kHz
max
CTC
T
, is
(1)
DT
DT
TH
DT
to
is
,
.
11
such as DT pin short-to-ground and lift open, shunt-
resistor and series resistor R
internally connected to the DT pin. Even when this pin is
shorted to ground and lifted open, the dead time is
limited to 50ns (short to ground) and 1000ns (lifted
open). Since the internal resistors have relatively large
tolerance, it is recommended to set the dead time
between 150ns and 600ns to minimize the dead time
variation by the internal resistor tolerance.
3. Soft-Start
Since the voltage gain of the resonant converter is
inversely proportional to the switching frequency, the
soft-start is implemented by sweeping down the
switching frequency from a high initial frequency until the
output voltage is established. The current-steering circuit
connected to SS pin adaptively changes the sinking and
sourcing current of the SS pin to set soft-start time, OLP
shutdown delay, and restart time. As illustrated in Figure
32, the sourcing current, I
beginning of startup, which rapidly raises V
V
I
the small value of I
allowing slow decrease of the switching frequency.
To minimize the frequency variation while the output
capacitance of the opto-transistor is charged up, soft-
start is delayed until the CON pin voltage (opto-coupler
transistor voltage) reaches the RT pin voltage. Thus, the
SS2
SS_START
HO Output
LO Output
Dead time(ns)
(30µA) and gate drive signals are enabled. Due to
600
500
400
300
200
100
0
0
(1.6V). Then the sourcing current is switched to
Figure 30. Gate Driving Signals
Figure 31. Dead Time vs. R
10
SS2
Dead time resistor (R
20
, the SS pin voltage slowly rises,
Dead Time
SS1
30
(3mA), is enabled at the
DT,Short
DT
, KΩ)
40
and R
DT
www.fairchildsemi.com
50
DT,Open
SS
time
60
up to
are

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