FDMF6833C Fairchild Semiconductor, FDMF6833C Datasheet
FDMF6833C
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FDMF6833C Summary of contents
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... A thermal warning function warns of a potential over-temperature situation. The FDMF6833C also incorporates a Skip Mode (SMOD#) for improved light-load efficiency. The FDMF6833C also provides a 3-state 5V PWM input for compatibility with a wide range of PWM controllers. Applications Notebook Computers ...
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... UVLO DISB# 10µA V CIN R UP_PWM Input PWM 3- State Logic R DN_PWM THWN# Temp. Sense CGND © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 VDRV VCIN VIN R BOOT DISB# BOOT PWM FDMF6833C PHASE SMOD# VSWH THWN# PGND CGND Figure 1. Typical Application Circuit VDRV ...
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... LOW). This pin has a 10µA internal pull-down current source. Do not add a noise filter capacitor. 40 PWM PWM signal input. This pin accepts a three-state 5V PWM signal from the controller. © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 Figure 4. Top View Description 3 www.fairchildsemi.com ...
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... MOSFET switching transients. For reliable DrMOS operation, VSWH-to-GND and BOOT-to-GND must remain at or below the Absolute Maximum Ratings shown in the table above. Refer to the “Application Information” and “PCB Layout Guidelines” sections of this datasheet for additional information. © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 Parameter Referenced to CGND Referenced to CGND ...
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... High-Level Input Voltage IH_SMOD V Low-Level Input Voltage IL_SMOD I Pull-Up Current PLU t Propagation Delay PD_SLGLL t Propagation Delay PD_SHGLH © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0 5V, and +25°C unless otherwise noted. CIN DRV A J Condition PWM=LOW or HIGH or Float Q VCIN ...
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... PD_PHGLL Delay Exiting 3-State Propagation t PD_TSGLH Delay Boot Diode V Forward-Voltage Drop F V Breakdown Voltage R © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0 5V, and +25°C unless otherwise noted. CIN DRV A J Condition I =5mA PLD SW=0V, Delay Between GH from HIGH to LOW and GL from LOW to HIGH = 30A +25° ...
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... V IH_PWM PWM VSWH VSWH t PD PHGLL t D_DEADON © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 90% 1.0V 10% t PD_PLGHL Figure 5. PWM Timing Diagram 7 V IL_PWM 10% 90% 1.2V t D_TIMEOUT ( 250ns Timeout) 2.2V t D_DEADOFF www.fairchildsemi.com ...
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... DRV CIN 1.5 1.4 1.3 1.2 1.1 1.0 0.9 100 200 300 400 500 600 Module Switching Frequency, F Figure 10. Power Loss vs. Switching Frequency © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 =1V, V =5V, V =5V, L OUT CIN DRV 300kHz 1000kHz ...
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... Power Loss vs. Output Inductor 12V 1V 300kHz OUT 4.0 4.5 5.0 Driver Supply Voltage, V Figure 16. Driver Supply Current vs. Driver Supply Voltage © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 =1V, V =5V, V =5V, L =250nH, T CIN DRV OUT 1 300kHz 30A SW OUT 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 5 ...
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... Driver IC Junction Temperature, T Figure 20. PWM Threshold vs. Temperature 2 CIN 2 1.8 1.6 1.4 1.2 - Driver IC Junction Temperature, T Figure 22. SMOD# Threshold vs. Temperature © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 =5V, T =25°C, and natural convection cooling, unless otherwise specified. A 4.5 UVLO 4.0 UP 3.5 3.0 2.5 2.0 1.5 1.0 UVLO DN 0.5 55 100 125 150 4 ...
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... Figure 24. DISB# Threshold vs. Driver Supply Voltage 12 CIN 11.5 11.0 10.5 10.0 9.5 9.0 - Driver IC Junction Temperature, T Figure 26. DISB# Pull-Down Current vs. Temperature © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 =5V, T =25°C, and natural convection cooling, unless otherwise specified. A 2.2 V IH_DISB# 2.0 1.8 1.6 V IL_DISB# 1.4 1.2 5.25 5.50 (V) CIN Figure 25. 500 450 ...
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... PWM input goes from three-state to LOW, the low-side MOSFET is turned on. If the PWM input goes from Driver State three-state to HIGH, the high-side MOSFET is turned on. This is illustrated in Figure 29. The FDMF6833C design allows for short propagation delays when exiting the three-state window (see Electrical Characteristics). Low-Side Driver ...
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... PD_SHGLH GS IH_SMOD © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 HIGH, Q2 begins to turn off after a propagation delay (t PD_PHGLL Q1 begins to turn on after adaptive delay t To preclude overlap during the HIGH-to-LOW transition (Q1 off to Q2 on), the adaptive circuitry monitors the voltage at the GH-to-PHASE pin pair ...
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... D_DEADOFF D_DEADON © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 When the SMOD# pin is pulled HIGH, the synchronous buck converter works in Synchronous Mode. This mode allows for gating on the Low Side MOSFET. When the SMOD# pin is pulled LOW, the low-side MOSFET is gated off ...
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... ON Open - Drain Output © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 VCIN Filter The VDRV pin provides power to the gate drive of the high-side and low-side power MOSFET. In most cases, it can be connected directly to VCIN, the pin that provides power to the logic section of the driver. For additional noise immunity filter can be inserted between the VDRV and VCIN pins ...
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... MOSFET, balance using the largest area possible to improve DrMOS cooling while maintaining acceptable noise emission output inductor should be located close to the FDMF6833C to minimize the power loss due to the V copper trace. Care should also be taken so the SWH inductor dissipation does not heat the DrMOS. ® ...
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... Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 Figure 33. PCB Layout Example (Top View) Figure 34. PCB Layout Example (Bottom View) 17 www.fairchildsemi.com ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2011 Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 B PIN#1 INDICATOR 6. ...
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... Fairchild Semiconductor Corporation FDMF6833C • Rev. 1.0.3 19 www.fairchildsemi.com ...