FAN5236 Fairchild Semiconductor, FAN5236 Datasheet - Page 17

• Manufacturer Part Number: FAN5236
• Manufacturer: Fairchild Semiconductor

© 2002 Fairchild Semiconductor Corporation
FAN5236 • Rev. 1.3.2
For the high-side MOSFET, V
high as 20V in a typical portable application. Care
should be taken to include the delivery of the
MOSFET’s gate power (PGATE) in calculating the
power dissipation required for the FAN5236:
where Q
Low-Side Losses
Q2, however, switches on or off with its parallel
Schottky diode conducting; therefore V
P
negligible and Q2 is selected based on R
Conduction losses for Q2 are given by:
where R
highest operating junction temperature, and:
is the minimum duty cycle for the converter.
Since D
produces a conservative result, further simplifying the
calculation.
The maximum power dissipation (P
the maximum allowable die temperature of the low-side
MOSFET, the Θ
temperature rise:
Θ
can be devoted to heat sinking (see FSC Application
Note AN-1029 — Maximum Power Enhancement
Techniques for SO-8 Power MOSFETs) .
P
P
P
D =
SW
JA
G
D
COND
(
ATE
MAX
depends primarily on the amount of PCB area that
V
is proportional to V
V
OUT
)
=
=
IN
=
Q
G
(
MIN
1
DS(ON)
is the total gate charge to reach V
T
G
−
( J
×
D
< 20% for portable computers, (1-D) ≈ 1
MAX
V
)
×
CC
is the R
)
Θ
I
JA
OUT
−
JA
×
, and the maximum allowable ambient
T
f
2
SW
A
(
×
MAX
R
DS(ON)
)
DS
DS
(
, Q2’s switching losses are
ON
)
DS
of the MOSFET at the
= V
D(MAX)
IN
, which can be as
DS
) is a function of
DS(ON)
≈ 0.5V. Since
CC
.
only.
(34)
(32)
(33)
(35)
17
Layout Considerations
Switching converters, even during normal operation,
produce short pulses of current that could cause
substantial ringing and be a source of EMI if layout
constraints are not observed.
There are two sets of critical components in a DC-DC
converter. The switching power components process
large amounts of energy at high rates and are noise
generators. The low-power components responsible for
bias and feedback functions are sensitive to noise.
A multi-layer printed circuit board is recommended.
Dedicate one solid layer for a ground plane. Dedicate
another solid layer as a power plane and break this
plane into smaller islands of common voltage levels.
Notice all the nodes that are subjected to high-dV/dt
voltage swing; such as SW, HDRV, and LDRV. All
surrounding circuitry tends to couple the signals from
these nodes through stray capacitance. Do not oversize
copper traces connected to these nodes. Do not place
traces connected to the feedback components adjacent
to these traces. It is not recommended to use high-
density interconnect systems, or micro-vias, on these
signals. The use of blind or buried vias should be
limited to the low-current signals only. The use of
normal thermal vias is at the discretion of the designer.
Keep the wiring traces from the IC to the MOSFET gate
and source as short as possible and capable of
handling peak currents of 2A. Minimize the area within
the gate-source path to reduce stray inductance and
eliminate parasitic ringing at the gate.
Locate small critical components, like the soft-start
capacitor and current sense resistors, as close as
possible to the respective pins of the IC.
The FAN5236 utilizes advanced packaging technology
with lead pitch of 0.6mm. High-performance analog
semiconductors utilizing narrow lead spacing may
require
manufacturing.
cleanliness of the area surrounding these devices.
special
It
considerations
is
critical
to
in
maintain
design
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proper
and