FAN5362 Fairchild Semiconductor, FAN5362 Datasheet - Page 9

• Manufacturer Part Number: FAN5362
• Description: The FAN5362 is a 500mA or 750mA, step-down, switching voltage regulator that delivers a fixed output voltage from an input voltage supply of 2
• Manufacturer: Fairchild Semiconductor

© 2009 Fairchild Semiconductor Corporation
FAN5362 • Rev. 1.0.4
Operation Description
FAN5362 is a 500mA or 750mA, step-down switching
voltage regulator that delivers a fixed output voltage from an
input voltage supply up to 5.5V. Using a proprietary
architecture with synchronous rectification, FAN5362 is
capable of delivering a peak efficiency above 96%, while
maintaining efficiency above 90% at load currents as low as
1mA. The regulator operates at a nominal frequency of
3MHz at full load, which reduces the value of the external
components to 1µH for the inductor and 4.7µF for the output
capacitor. High efficiency is maintained at light load with
single-pulse PFM mode.
Control Scheme
The FAN5362 uses a proprietary, non-linear, fixed-
frequency PWM modulator to deliver a fast load transient
response,
frequency over a wide range of operating conditions. The
regulator performance is independent of the output
capacitor ESR, allowing for the use of ceramic output
capacitors. Although this type of operation normally
results in a switching frequency that varies with input
voltage and load current, an internal frequency loop holds
the switching frequency constant over a large range of
input voltages and load currents.
For very light loads, the FAN5362 operates in discontinuous
current (DCM) single-pulse PFM mode, which produces low
output ripple compared with other PFM architectures.
Transition between PWM and PFM is seamless, with a glitch
of less than 18mV at V
DCM and CCM modes.
Combined
characteristics, the very low quiescent current of the
controller (45µA) maintains high efficiency, even at very light
loads,
applications requiring tight output regulation.
100% Duty Cycle Operation
When V
cycle until 100% duty cycle is reached. As the duty cycle
approaches 100%, the switching frequency declines due to
the minimum off-time (t
control circuit. When 100% duty cycle is reached, V
follows V
the total resistance between V
To calculate the worst-case V
PMOS R
Enable and Soft Start
When the EN pin is LOW, the IC is shut down and the part
draws very little current. In addition, during shutdown, FB is
actively discharged to ground through a 230 path. Raising
EN above its threshold voltage activates the part and starts
the soft-start cycle. During soft-start, the internal reference is
ramped using an exponential RC shape to prevent any
overshoot of the output voltage. Current limiting minimizes
inrush during soft-start.
V
DROPOUT
IN
while
DS(ON)
IN
approaches V
with a drop-out voltage (V

while
I
LOAD
with
at high temperature from Figure 6.
preserving


PMOS
maintaining
exceptional
OFF(MIN)
OUT
OUT
R
, the regulator increases its duty
DS
fast
) of about 35ns imposed by the
during the transition between
IN
(
ON
and V
DROPOUT
)

transient
a
DCR
DROPOUT
OUT
transient
constant
, use the maximum
L
:

) determined by
response
switching
response
OUT
(1)
for
9
Synchronous rectification is inhibited during soft-start,
allowing the IC to start into a pre-charged load.
The IC may fail to start if heavy load is applied during startup
and/or if excessive C
limit fault response, which protects the IC in the event of an
over-current condition present during soft-start.
The current required to charge C
commonly referred to as “displacement current” and given as:
where
To prevent shutdown during soft-start, the following condition
must be met:
where I
guaranteed to support (500mA or 750mA).
MODE Pin
Logic 1 on this pin forces the IC to stay in PWM mode. A
logic 0 allows the IC to automatically switch to PFM during
light loads. If the MODE pin is toggled, the converter
synchronizes its switching frequency to four times the
frequency on the mode pin (f
At startup, the mode pin must be held LOW or HIGH for at
least 10s to ensure that the converter does not attempt to
synchronize to this pin.
Under-Voltage Lockout
When EN is HIGH, the under-voltage lockout keeps the part
from operating until the input supply voltage rises high
enough to properly operate. This ensures no misbehavior of
the regulator during startup or shutdown.
Current Limiting
A heavy load or short circuit on the output causes the current
in the inductor to increase until a maximum current threshold
is reached in the high-side switch. Upon reaching this point,
the high-side switch turns off, preventing high currents from
causing damage. 16 consecutive PWM cycles in current limit
causes the regulator to shut down and stay off for about
2900s before attempting a restart.
In the event of a short circuit, the soft-start circuit attempts to
restart at 240s, which results in a duty cycle of less than
10%, providing current into a short.
The closed-loop peak-current limit, I
as the open-loop tested current limit, I
Characteristics table. This is primarily due to the effect of
propagation delays of the IC current limit comparator.
I
I
DISP
DISP


dV
C
dt
I
MAX(DC)
LOAD
OUT
refers to the soft-start slew rate.


dV
is the maximum load current the IC is
dt
I
MAX
OUT
(
DC
is used. This is due to the current-
)
MODE
).
OUT
LIM(PK)
LIM(OL)
during soft-start is
, is not the same
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