FAN4603 Fairchild Semiconductor, FAN4603 Datasheet - Page 10

• Manufacturer Part Number: FAN4603
• Description: The FAN4603 is a fully integrated synchronous DC/DC buck converter that provides up to 600mA of output current over an input voltage ranging from 2
• Manufacturer: Fairchild Semiconductor

© 2009 Fairchild Semiconductor Corporation
FAN4603 • Rev. 1.0.1
Reducing PFM Output Ripple
PFM output ripple amplitude can be reduced by adding
external C
Reduced output ripple also results in less DC voltage
excursion at very light loads. Maximum PFM ripple occurs at
no load and is V
Note:
4.
The effective value of external C
amplitude can be determined using:
where V
V
The simplified equation above is representative of nominal
component values and does not account for device
tolerances. The bias level effects associated with case size,
voltage rating, and dielectric type of ceramic capacitors
should be considered when selecting C
Minimum Off-Time Effect on Switching
Frequency
t
constraints on the maximum/minimum
FAN4603 can provide while maintaining a fixed switching
frequency in PWM mode.
When V
When V
The switching frequency drops when the regulator cannot
provide sufficient duty cycle at 6MHz to maintain regulation.
Lowering the switching frequency allows V
regulation, even at very low or very high duty cycle.
C
V
Figure 28. Typical 1.82V
V
OFF(MIN)
V
IN
V
OUT
OUT
OUT
IN
IN
and V
Ripple is less for lower V
.
(
μ
≤
) F
≥
IN
1
R
IN
is 50ns, while t
OUT
=
t
−
is LOW, fixed switching is maintained as long as
OUT
is the desired output ripple amplitude in mV and
is HIGH, fixed switching is maintained as long as
ON
⎛
⎜
⎜
⎝
t
OFF
(
V
, with negligible impact on efficiency.
are in Volts.
(
IN
MIN
(
IN
−
MIN
)
V
and V
OUT
•
V
)
IN
•
f
f
)
•
SW
SW
•
V
OUT
V
R
OUT
≈
≈
OUT
proportional.
ON(MIN)
0
OUT
0
7 .
•
2 .
No Load PFM Ripple vs. V
62
.
levels.
⎞
⎟
⎟
⎠
−
is 35nS This imposes
OUT
1
OUT
for a desired ripple
.
V
V
OUT
OUT
IN
to remain in
that the
(3)
IN
10
PCB Layout Guideline
FB (pin 5) must be directly connected to VOUT (pin 4).
Figure 29 shows the recommended locations of optional C
and C
Pad P1, shown in Figure 30 “Land Pattern,” is an optional
GND pin. Connection is not required on the PCB.
OUT
Figure 29.
, shown as 0603 size devices.
Recommended PCB Layout
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IN