FAN2110 Fairchild Semiconductor, FAN2110 Datasheet - Page 15
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FAN2110
Manufacturer Part Number
FAN2110
Description
This part is covered in Fairchild's href="http://www
Manufacturer
Fairchild Semiconductor
Datasheet
1.FAN2110.pdf
(17 pages)
© 2008 Fairchild Semiconductor Corporation
FAN2110 • Rev. 1.0.3
The ILIM pin can source a 10µA current that can be
used to establish a lower, temperature–dependent,
current-limit threshold by connecting an external resistor
(R
equation:
where:
I
V
V
R
f
After
cycles, the fault latch is set and the regulator shuts
down. Cycling V
normal soft-start cycle (refer to Auto-Restart section).
The over-current protection fault latch is active during
the soft-start cycle. Use a 1% resistor for R
Always use an external resistor R
limit at the desired level. When R
the IC’s internal default current limit is fairly high. This
could lead to operation at high load currents, causing
overheating of the regulator. For a given R
setting, the current limit point varies slightly in an inverse
relationship with respect to input voltage (V
Loop Compensation
The loop is compensated using a feedback network
around the error amplifier. Figure 34 shows a complete
type-3 compensation network. For type-2 compensation,
eliminate R3 and C3.
R
OUT
ILIM
OUT
IN
RAMP
ILIM
(
K
) to AGND. R
= Full load current in Amps;
= Set output voltage;
= Input voltage;
= Ramp resistor used in K; and
= Selected switching frequency in KHz.
16
)
95
consecutive,
6
1 .
Figure 33. ILIM Network
I
OUT
CC
ILIM
or EN restores operation after a
(
V
IN
can be approximated with the
(
R
. 1
RAMP
pulse-by-pulse,
) 8
V
OUT
) 2
V
ILIM
ILIM
. 3
IN
33
to set the current
is not connected,
f
10
6
ILIM
ILIM
IN
).
current-limit
.
and R
RAMP
(7)
15
Since the FAN2110 employs summing current-mode
architecture, type-2 compensation can be used for many
applications. For applications that require wide loop
bandwidth and/or use very low-ESR output capacitors,
type-3 compensation may be required.
R
changes in V
gain increases as V
difficult to compensate the loop. For low-input-voltage-
range designs (3V to 8V), R
component values will be different compared to designs
with V
Recommended PCB Layout
Good PCB layout and careful attention to temperature
rise is essential for reliable operation of the regulator.
Four-layer PCB with two-ounce copper on the top and
bottom side and thermal vias connecting the layers is
recommended. Keep power traces wide and short to
minimize losses and ringing. Do not connect AGND to
PGND below the IC. Connect the AGND pin to PGND at
the output OR to the PGND plane.
RAMP
V
IN
OUT
Figure 35. Recommended PCB Layout
also provides feedforward compensation for
between 8V and 24V.
Figure 34. Compensation Network
IN
. With a fixed R
IN
is reduced, which could make it
RAMP
SW
RAMP
and the compensation
GND
V
value, the modulator
IN
www.fairchildsemi.com
GND