FAN7393A Fairchild Semiconductor, FAN7393A Datasheet
FAN7393A
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FAN7393A Summary of contents
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... FAN7393AMX © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 Description The FAN7393A is a half-bridge gate-drive IC with shut- down and programmable dead-time control functions that can drive high-speed MOSFETs and Isolated Gate Bridge Transistors (IGBTs) operating up to +600V. It has Swing to -9.8V for ...
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... Internal Block Diagram IN 1 250K SCHMITT 5V TRIGGER INPUT 250K 2 SD SHOOT-THROUGH PREVENTION R DTINT DT 4 DEAD-TIME { DTMIN=400ns } Pin and 14 are no connection © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0 BOOT BOOT FAN7393A ...
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... COM © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0 COM Figure 3. Pin Configurations (Top View) ...
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... DT Programmable Dead-Time Pin Voltage V Logic Ground SS T Operating Ambient Temperature A © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 =25°C unless otherwise specified. A Characteristics (1) ( This supply pin should not be driven by a low-impedance voltage BS specified in the Electrical Characteristics section. under any circumstances. ...
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... Allowable Negative Propagation to HO Note: 5 These parameters are guaranteed by design. © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 , and T =25°C unless otherwise specified. The /COM and are applicable to the respective input leads: IN and SD. The V Test Condition V = ...
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... Turn-Off Fall Time F Dead Time: LO Turn-Off to HO Turn-On Turn-Off to LO Turn-On MDT Dead-Time Matching=|DT Note: 6 The turn-on propagation delay includes dead time. © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 =1000pF, DT=V and T =25°C, unless otherwise specified. L SS, A Conditions (6) V =0V, R =0Ω ...
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... Figure 6. Turn-On Rise Time vs. Temperature 500 450 400 350 300 -40 - Temperature [°C] Figure 8. Dead Time (R =0Ω) vs. Temperature DT © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 250 200 150 100 High-Side Low-Side 100 120 -40 Figure 5. Turn-Off Propagation Delay 35 High-Side ...
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... Temperature [°C] Figure 12. Delay Matching vs. Temperature 200 180 160 140 120 100 -40 - Temperature [°C] Figure 14. Shutdown Propagation Delay vs. Temperature © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 (Continued) 500 DT1 DT2 Ω R =200K DT 250 0 -250 -500 - 100 120 Figure 11 ...
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... Temperature [°C] Figure 18. Operating V DD vs. Temperature 10.0 9.5 9.0 8.5 8.0 7.5 -40 - Temperature [°C] Figure 20. V UVLO+ vs. Temperature DD © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 (Continued) 100 - 100 120 Supply Current Figure 17. Quiescent V 800 700 600 500 400 300 200 ...
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... UVLO+ vs. Temperature BS 2.0 1.5 1.0 0.5 0.0 -40 - Temperature [°C] Figure 24. High-Level Output Voltage vs. Temperature 3.0 2.5 2.0 1.5 1.0 -40 - Temperature [°C] Figure 26. Logic HIGH Input Voltage vs. Temperature © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 (Continued) 10.0 9.5 9.0 8.5 8.0 7 100 120 -40 Figure 23. V 1.0 High-Side 0.8 Low-Side 0.6 0.4 0.2 0.0 -0.2 -0 100 120 -40 Figure 25 ...
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... Supply Voltage [V] Figure 30. Turn-On Propagation Delay vs. Supply Voltage Supply Voltage [V] Figure 32. Turn-On Rise Time vs. Supply Voltage © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 (Continued -10 -11 -12 - 100 120 -40 Figure 29. Allowable Negative V 250 High-Side ...
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... Supply Voltage [V] Figure 34. Quiescent V DD vs. Supply Voltage 2.0 1.5 1.0 0.5 0 Supply Voltage [V] Figure 36. High-Level Output Voltage vs. Supply Voltage © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 (Continued) 100 Supply Current Figure 35. Quiescent V 1.0 High-Side 0.8 Low-Side 0.6 0.4 0.2 0.0 -0.2 -0 ...
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... Switching Time Definitions SD LO +15V μ DT1 DT2 IN 50 OFF F 90 © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0 COM 1nF ...
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... SD IN 50% t OFF 90 IN(LO) 50% 50% IN(HO 10% © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0 Figure 41. Shutdown Waveform Definition LO-HO 10% MDT LO-HO HO-LO Figure 42. Dead-Time Waveform Definition LO HO 10% Figure 43. Delay Matching Waveform Definition 14 50% DT HO-LO 10% 90% t OFF 50% 50% MT OFF 90% 90% www ...
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... Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2010 Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 8.76 A 8.36 7.62 ...
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... Fairchild Semiconductor Corporation FAN7393A • Rev. 1.0.0 16 www.fairchildsemi.com ...