KSC5502DT Fairchild Semiconductor, KSC5502DT Datasheet
KSC5502DT
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KSC5502DT Summary of contents
Page 1
... Pulse Test : Pulse Width = 5ms, Duty Cycle Thermal Characteristics Symbol R Thermal Resistance Maximun Lead Temperature for Soldering Purpose L : 1/8” from Case for 5 seconds ©2001 Fairchild Semiconductor Corporation KSC5502D/KSC5502DT B T =25 C unless otherwise noted C Parameter = = 10% T =25 C unless otherwise noted ...
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... Collector-Emitter Saturation Voltage CE V (sat) Base-Emitter Saturation Voltage BE C Input Capacitance ib C Output Capacitance ob f Current Gain Bandwidth Product T V Diode Forward Voltage F ©2001 Fairchild Semiconductor Corporation T =25 C unless otherwise noted C Test Condition I =1mA =5mA =500 ...
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... Turn Off Time OFF INDUCTIVE LOAD SWITCHING (V t Storage Time STG t Fall Time F t Cross-over Time C t Storage Time STG t Fall Time F t Cross-over Time C ©2001 Fairchild Semiconductor Corporation T =25 C unless otherwise noted C Test Condition I =0. =0. = =0.4A, I =80mA =300V ...
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... Figure 3. Collector-Emitter Saturation Voltage 2 =25 ℃ ℃ ℃ ℃ 1.0A 1 0.4A I =0. 10m 100m I [A], BAS Figure 5. Typical Collector Saturation Voltage ©2001 Fairchild Semiconductor Corporation 1A 900m A 800m A 700m A 100 600m A 500m A 400m A 300m A 200m A I =100m =125 ℃ ...
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... T J =25 ℃ ℃ ℃ ℃ 1 0.3 0.4 0.5 0.6 0.7 0.8 0 Figure 11. Resistive Switching Time, t ©2001 Fairchild Semiconductor Corporation (Continued =125℃ 2000 F=1MHz 1000 1000 900 800 700 600 500 400 ...
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... =300V Z L =200uH C 4 3.5 =25 ℃ 2.5 2 0.3 0.4 0.5 0.6 0.7 0 LEC Figure 17. Inductive Switching Time, t ©2001 Fairchild Semiconductor Corporation (Continued =5I = =300V c 2.5 PW=20us 2 =125 ℃ ℃ ℃ ℃ 1 0.3 Figure 14 ...
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... F E Figure 21. Inductive Switching Time 5ms 1ms DC 1 0.1 0.01 10 100 V [A], CO LLECT OR EM ITTER VO LTAG Figure 23. Forward Bias Safe Operating Area ©2001 Fairchild Semiconductor Corporation (Continued) 2 ℃ ℃ ℃ ℃ ℃ ℃ Figure 20. Inductive Switching Time 200 I ...
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... Typical Characteristics 10 1ms 5ms DC 1 0.1 0.01 10 100 V [A], CO LLECT OR EM ITTER VO LTAG Figure 25. Forward Bias Safe Operating Area ©2001 Fairchild Semiconductor Corporation (Continued) 60 =25 ℃ ℃ ℃ ℃ 50us 1000 100 125 150 175 200 ( ℃ ...
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... Package Demensions 1.27 2.54TYP [2.54 ©2001 Fairchild Semiconductor Corporation TO-220 9.90 0.20 (8.70) ø3.60 0.10 1.52 0.10 0.10 0.80 0.10 2.54TYP ] [2.54 ] 0.20 0.20 10.00 0.20 4.50 0.20 +0.10 1.30 –0.05 +0.10 0.50 2.40 0.20 –0.05 Dimensions in Millimeters Rev. A2, August 2001 ...
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... Package Demensions (0.50) MAX0.96 2.30TYP [2.30 0.20] ©2001 Fairchild Semiconductor Corporation (Continued) D-PAK 6.60 0.20 5.34 0.30 (4.34) (0.50) 0.76 0.10 2.30TYP [2.30 0.20] 6.60 (2XR0.25) 2.30 0.10 0.50 0.10 0.50 0.10 1.02 0.20 2.30 0.20 0.20 (5.34) (5.04) (1.50) 0.76 0.10 Dimensions in Millimeters Rev. A2, August 2001 ...
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... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. A CEx™ FAST FASTr™ Bottomless™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DenseTrench™ ...