TLE84110EL Infineon Technologies, TLE84110EL Datasheet - Page 24

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TLE84110EL

Manufacturer Part Number
TLE84110EL
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE84110EL

Packages
PG-SSOP-24
Ipeak
10 x 0.8
Inhibit
y
Iq (typ)
2.0 µA
Mounting
SMIT
Technology
BCD

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Part Number
Manufacturer
Quantity
Price
Part Number:
TLE84110EL
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Part Number:
TLE84110EL
0
Company:
Part Number:
TLE84110EL
Quantity:
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6.3
6.3.1
Control Register Overview
Control Register 0 for HB 1 : HB 6
Control Register 1 for HB 7 : HB 10
Table 3
Bit
Activate Half-Bridge X
12
11
10
Data Sheet
Diagnosis & Register Control
15
14
13
SRR
SRR
15
15
ACT_HB 6
ACT_HB 5
Control
Register - 0
HB 1:6
SRR
(HB1:6)
0
OL SD EN
(HB1:6)
ACT_HB 4
14
14
0
1
SPI Bit Definitions
Control - Word
Input (Control) Data Register
OL_SD
OL_SD
_EN
_EN
13
13
Control
Register - 1
HB 7:10
SRR
(HB7:10)
1
OL SD EN
(HB7:10)
X
X
ACT_HB 10
ACT_
HB6
12
12
X
ACT_
HB5
11
11
X
ACT_
ACT_
HB10
HB4
10
10
Control Register - 0
HB 1:6
DESCRIPTION
Status Register Reset (SRR) for HB1
to HB 6.
If set to high, the errors bits of the
coresponding status register are reset
on the rising edge of CSN if sent to
the uC. Low indicates no reset.
Address Register
Open Load Detection Shutdown
Enable (OL SD EN) for HB1 to HB 6.
This feature allows the affected
output stage to be switched off if a
true open load or underload
condition has been detected. It can
be activated or deactivated by bit 13.
H => Half Bridge 6 is active
L => Half Bridge 6 is in Hi-Z
H => Half Bridge 5 is active
L => Half Bridge 5 is in Hi-Z
H => Half Bridge 4 is active
L => Half Bridge 4 is in Hi-Z
ACT_
ACT_
HB3
HB9
9
9
ACT_
ACT_
HB2
HB8
8
8
24
ACT_
ACT_
HB1
HB7
7
7
CONF_
HB6
6
6
X
CONF_
HB5
5
5
X
Control Register - 1
HB 7:10
DESCRIPTION
Status Register Reset (SRR) for HB7
to HB 10.
If set to high, the errors bits of the
coresponding status register are
reset on the rising edge of CSN if sent
to the uC. Low indicates no reset.
Open Load Detection Shutdown
Enable (OL SD EN) for HB7 to HB 10.
This feature allows the affected
output stage to be switched off if a
true open load or underload condition
has been detected. It can be
activated or deactivated by bit 13.
X => Don’t Care
X => Don’t Care
H => Half Bridge 10 is active
L => Half Bridge 10 is in Hi-Z
CONF_
CONF_
HB10
HB4
4
4
CONF_
CONF_
HB3
HB9
3
3
Deci Half Bridge IC
Rev. 1.0, 2010-04-27
CONF_
CONF_
HB2
HB8
2
2
TLE84110EL
CONF_
CONF_
HB1
HB7
1
1
0
0
0
0
SPI

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