TLE7250GVIO Infineon Technologies, TLE7250GVIO Datasheet - Page 5

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TLE7250GVIO

Manufacturer Part Number
TLE7250GVIO
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE7250GVIO

Packages
PG-DSO-8
Transmission Ratemax
1.0 Mbit/s
Quiescent Current (max.)
< 15 µA @ 5V standby
Bus Wake-up Capability
No
Additional Features
NEN; Vio
Wake-up Inputs
No

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3
3.1
Figure 2
3.2
Table 1
Pin
1
2
3
4
5
6
7
8
1) The designation of pin 8 is different in the TLE7250GVIO and its predecessor, the TLE6250GV33. The function of pin 8
Data Sheet
remains the same.
Symbol
TxD
GND
V
RxD
V
CANL
CANH
NEN
CC
IO
Pin Configuration
Pin Assignment
Pin configuration
Pin Definitions and Functions
Pin Definition and Functions
TxD
GND
V
RxD
CC
Function
Transmit Data Input;
internal pull-up to
Ground
Transceiver Supply Voltage;
100 nF decoupling capacitor to GND required.
Receive Data Output;
“low” in “dominant” state.
Digital Supply Voltage Input;
supply voltage input to adapt the logical input and output voltage levels of the
transceiver to the microcontroller supply.
100 nF decoupling capacitor to GND required.
CAN Bus Low Level I/O;
“low” in “dominant” state.
CAN Bus High Level I/O;
“high” in “dominant” state.
Not Enable Input
internal pull-up to
1
2
3
4
V
1)
V
;
IO
IO
, “low” for “dominant” state.
, “low” for normal-operating mode.
5
8
7
6
5
CANH
CANL
NEN
V
IO
Rev. 1.0, 2012-03-14
Pin Configuration
TLE7250GVIO

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