ICLS8082G Infineon Technologies, ICLS8082G Datasheet - Page 13

• Manufacturer Part Number: ICLS8082G
• Manufacturer: Infineon Technologies

Specifications of ICLS8082G

• Packages: PG-DSO-12
• Vds: 800V
• Rds (on): 2,26

source capacitor) minus the propagation delay from the detected zero-crossing to switch-on of the main switch
t
This time delay should be matched by adjusting the time constant of the RC network which is calculated as:
3.5
After the MOSFET is turned off, there will be some oscillation on VDS, which will also appear on the voltage at the
ZC pin. To prevent the MOSFET from being mistriggered by oscillations of this kind, a ringing suppression timer
is implemented. The timer is dependent on the voltage Vzc. If the voltage Vzc is lower than the threshold
longer preset time applies, while a shorter time is set when the voltage Vzc is higher than the threshold.
3.6
After the gate drive goes to low, it cannot be changed to high during the ring suppression time.
After the ring suppression time, the gate drive can be turned on when zero crossing is detected.
However, it is also possible that the oscillation between the primary inductor and drain-source capacitor is
dampened very quickly and that the IC cannot detect zero crossing. In this case, a maximum off-time is
implemented. After the gate drive has remained off for the period of T
regardless of the counter values and Vzc. This function can effectively prevent the switching frequency from falling
below 20 kHz, otherwise this will cause audible noise during start-up.
3.7
In the converter system, the primary current is sensed by an external shunt resistor, which is connected between
the low-side terminal of the main power switch and the common ground. The sensed voltage across the shunt
resistor V
voltage at the pin VR. Once the voltage V1 exceeds the voltage
main power switch is switched off. The relationship between the V1 and the Vcs is described by:
To avoid mistriggering caused by the voltage spike across the shunt resistor at turn-on of the main power switch,
a leading edge blanking time, t
is turned on, the minimum on-time of the gate drive is the leading edge blanking time.
In addition, there is a maximum on-time, t
the high state for longer than the maximum on-time, it will be turned off to prevent the switching frequency from
going too low because of an overly long on-time.
Data Sheet
delay
τ
. This is theoretically:
td
V
1
Δ
=
=
t
CS
C
=
3
is applied to an internal current measurement unit, and its output voltage V1 is compared with the
3 .
ZC
Ringing Suppression Time
Switch-on Determination
Switch-off Determination
T
OSC
4
⋅
⋅
V
R
CS
R
−
ZC
ZC
t
delay
+
1
1
+
0
⋅
7 .
R
R
ZC
ZC
2
2
LEB
, is applied to the output of the comparator. In other words, once the gate drive
OnMax
, limitation implemented in the IC. Once the gate drive has been in
Offline LED Controller For PFC and Dimming
13
V
VR
, the output flip-flop is reset. As a result, the
OffMax
, the gate drive will be turned on again
Functional Description
Rev1.0, 2011-03-01
ICLS8082G
V
ZCRS
(2)
(3)
a