ATA6613 ATMEL Corporation, ATA6613 Datasheet - Page 174

• Manufacturer Part Number: ATA6613
• Description: Ata6613
• Manufacturer: ATMEL Corporation

6.15.8
6.15.8.1
174
ATA6612/ATA6613
8-bit Timer/Counter Register Description
Timer/Counter Control Register A – TCCR2A
Table 6-58.
Table 6-59
mode.
Table 6-59.
Note:
• Bits 7:6 – COM2A1:0: Compare Match Output A Mode
Initial Value
Read/Write
COM2A1
COM2A1
These bits control the Output Compare pin (OC2A) behavior. If one or both of the
COM2A1:0 bits are set, the OC2A output overrides the normal port functionality of the I/O
pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC2A pin must be set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM22:0 bit setting.
bits are set to a normal or CTC mode (non-PWM).
Bit
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
for more details.
shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM
COM2A1 COM2A0 COM2B1 COM2B0
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
R/W
COM2A0
COM2A0
7
0
0
1
0
1
0
1
0
1
R/W
Table 6-58
6
0
Normal port operation, OC0A disconnected.
Toggle OC2A on Compare Match
Clear OC2A on Compare Match
Set OC2A on Compare Match
Description
Normal port operation, OC2A disconnected.
WGM22 = 0: Normal Port Operation, OC0A Disconnected.
WGM22 = 1: Toggle OC2A on Compare Match.
Clear OC2A on Compare Match, set OC2A at TOP
Set OC2A on Compare Match, clear OC2A at TOP
Description
R/W
5
0
shows the COM2A1:0 bit functionality when the WGM22:0
R/W
4
0
R
3
–
0
(1)
R
2
–
0
“Fast PWM Mode” on page 169
WGM21
R/W
1
0
WGM20
R/W
9111C–AUTO–02/08
0
0
TCCR2A