ATA6613 ATMEL Corporation, ATA6613 Datasheet - Page 52

• Manufacturer Part Number: ATA6613
• Description: Ata6613
• Manufacturer: ATMEL Corporation

6.6.1.4
6.6.1.5
6.6.2
6.6.2.1
6.6.2.2
52
ATA6612/ATA6613
Clock Sources
Asynchronous Timer Clock – clk
ADC Clock – clk
Default Clock Source
Clock Startup Sequence
The Asynchronous Timer clock allows the Asynchronous Timer/Counter to be clocked directly
from an external clock or an external 32 kHz clock crystal. The dedicated clock domain allows
using this Timer/Counter as a real-time counter even when the device is in sleep mode.
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O clocks
in order to reduce noise generated by digital circuitry. This gives more accurate ADC conversion
results.
The device has the following clock source options, selectable by Flash Fuse bits as shown
below. The clock from the selected source is input to the AVR clock generator, and routed to the
appropriate modules.
Table 6-4.
Note:
The device is shipped with internal RC oscillator at 8.0MHz and with the fuse CKDIV8 pro-
grammed, resulting in 1.0MHz system clock. The startup time is set to maximum and time-out
period enabled. (CKSEL = "0010", SUT = "10", CKDIV8 = "0"). The default setting ensures that
all users can make their desired clock source setting using any available programming interface.
Any clock source needs a sufficient V
cycles before it can be considered stable.
To ensure sufficient V
the device reset is released by all other reset sources. The section
on page 68
the Watchdog Oscillator and the number of cycles in the delay is set by the SUTx and CKSELx
fuse bits. The selectable delays are shown in
Watchdog Oscillator is voltage dependent as shown in
Device Clocking Option
Low Power Crystal Oscillator
Full Swing Crystal Oscillator
Low Frequency Crystal Oscillator
Internal 128 kHz RC Oscillator
Calibrated Internal RC Oscillator
External Clock
Reserved
ADC
1. For all fuses “1” means unprogrammed while “0” means programmed.
describes the start conditions for the internal reset. The delay (t
Device Clocking Options Select
ASY
CC
, the device issues an internal reset with a time-out delay (t
CC
to start oscillating and a minimum number of oscillating
(1)
Table 6-5 on page
“Register Summary” on page
“System Control and Reset”
53. The frequency of the
TOUT
1111 - 1000
0111 - 0110
0101 - 0100
CKSEL3..0
0011
0010
0000
0001
9111C–AUTO–02/08
) is timed from
344.
TOUT
) after