XC3S502 Xilinx Corp., XC3S502 Datasheet - Page 29

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XC3S502

Manufacturer Part Number
XC3S502
Description
Spartan-3 Fpga Family Complete Data Sheet
Manufacturer
Xilinx Corp.
Datasheet
Choosing the READ_FIRST attribute, data already stored in
the addressed location pass to the DO outputs before that
location is overwritten with new data from the DI inputs on
Choosing a third attribute called NO_CHANGE puts the DO
outputs in a latched state when asserting WE. Under this
condition, the DO outputs will retain the data driven just
DS099-2 (v2.2) May 25, 2007
Product Specification
R
Figure 13: Waveforms of Block RAM Data Operations with WRITE_FIRST Selected
Figure 14: Waveforms of Block RAM Data Operations with READ_FIRST Selected
ADDR
ADDR
CLK
CLK
WE
WE
DO
DO
EN
EN
DI
DI
DISABLED
DISABLED
0000
0000
XXXX
XXXX
aa
aa
READ
READ
MEM(aa)
MEM(aa)
www.xilinx.com
MEM(bb)=1111
1111
bb
MEM(bb)=1111
1111
bb
WRITE
WRITE
old MEM(bb)
an enabled active CLK edge. READ_FIRST timing is shown
in the portion of
before WE was asserted. NO_CHANGE timing is shown in
the portion of
1111
Spartan-3 FPGA Family: Functional Description
2222
cc
2222
cc
MEM(cc)=2222
MEM(cc)=2222
WRITE
WRITE
old MEM(cc)
Figure 15
2222
Figure 14
during which WE is High.
dd
dd
DS099-2_14_030403
DS099-2_15_030403
during which WE is High.
XXXX
XXXX
READ
READ
MEM(dd)
MEM(dd)
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