XC3S502 Xilinx Corp., XC3S502 Datasheet - Page 98

• Manufacturer Part Number: XC3S502
• Description: Spartan-3 Fpga Family Complete Data Sheet
• Manufacturer: Xilinx Corp.

Spartan-3 FPGA Family: DC and Switching Characteristics
98
04/03/06
04/26/06
05/25/07
Date
Version No.
2.0
2.1
2.2
Upgraded Module 3, removing Preliminary status. Moved XC3S5000 to Production status in
Finalized I/O timing on XC3S5000 for v1.38 speed files. Added minimum timing values for various logic
and I/O paths. Corrected labels for R
mask revision ‘E’ specifications for LVDS_25, RSDS_25, LVDSEXT_25 differential outputs to
Added BLVDS termination requirements to
Outputs (SSOs) limits in
on a printed circuit board. Updated Note 2 in
minimum pulse width specification, T
Updated document links.
Improved absolute maximum voltage specifications in
allowance. Improved XC3S50 HBM ESD to 2000V in
data, improved (reduced) the maximum quiescent current limits for the I
in
footnote in
in
Table
Table
33. Widened the recommended voltage range for the PCI standard and clarified the hysteresis
63.
Table
34. Noted restriction on combining differential outputs in
Table 49
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for quad-flat packaged based on silicon testing using devices soldered
PU
INIT
and R
, to
Figure
Table
Description
Table
PD
and updated R
64.
32. Improved recommended Simultaneous Switching
62. Updated Note 6 in
Table
Table
27. Based on extensive 90 nm production
27, providing additional overshoot
PD
conditions for in
CCINTQ
Table
Table
DS099-3 (v2.2) May 25, 2007
and I
37. Updated footnote 1
29. Added INIT_B
Product Specification
Table
CCOQ
32. Added final
specifications
Table
Table
38.
37.
R