HM-65262 Intersil Corporation, HM-65262 Datasheet - Page 4

• Manufacturer Part Number: HM-65262
• Description: 16k X 1 Asynchronous Cmos Static Ram
• Manufacturer: Intersil Corporation

AC Electrical Specifications
NOTES:
READ CYCLE
WRITE CYCLE
1. Input pulse levels: 0 to 3.0V; Input rise and fall times: 5ns (max); Input and output timing reference level: 1.5V; Output load: 1 TTL gate
2. Tested at initial design and after major design changes.
3. V
(10) TWLWH
(11) TAVWL
(12) TWHAX
(13) TDVWH
(14) TWHDX
(15) TWLQZ
(16) TWHQX
(17) TAVWH
(18) TAVEL
(19) TEHAX
(20) TAVEH
(21) TELEH
(22) TWLEH
(23) TDVEH
(24) TEHDX
(1) TAVAX
(2) TAVQV
(3) TELQV
(4) TELQX
(5) TEHQX
(6) TAXQX
(7) TEHQZ
(8) TAVAX
(9) TELWH
equivalent and C
SYMBOL
CC
= 4.5 and 5.5V.
Read/Cycle Time
Address Access Time
Chip Enable Access Time
Chip Enable Output Enable
Time
Chip Disable Output Hold
Time
Address Invalid Output Hold
Time
Chip Enable Output Disable
Time
Write Cycle Time
Chip Selection to End of
Write
Write Enable Pulse Width
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
Write Enable Output Disable
Time
Write Disable Output Enable
Time
Address Valid to End of Write
Address Setup Time
Address Hold Time
Address Valid to End of Write
Enable Pulse Width
Write Enable Pulse Setup
Time
Chip Setup Time
Data Hold Time
L
= 50pF (min) - for C
PARAMETER
V
CC
L
= 5V 10%,T
greater than 50pF, access time is derated by 0.15ns per pF.
MIN
HM-65262B-9
70
70
55
40
30
55
55
55
40
30
5
5
5
0
0
0
0
0
0
0
-
-
-
-
A
= -40
HM-65262
MAX
o
70
70
30
30
C to +85
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
6-4
o
C (HM-65262B-9, HM-65262-9, HM-65262C-9)
MIN
85
85
65
45
35
65
65
65
45
35
HM-65262-9
5
5
5
0
0
0
0
0
0
0
-
-
-
-
LIMITS
MAX
85
85
30
30
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MIN
HM-65262C-9
85
85
65
45
35
65
65
65
45
35
5
5
5
0
0
0
0
0
0
0
-
-
-
-
MAX
85
85
30
30
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CONDITIONS
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 2, 3)
(Notes 2, 3)
(Notes 2, 3)
(Notes 2, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 2, 3)
(Notes 2, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
(Notes 1, 3)
TEST