HM-65262 Intersil Corporation, HM-65262 Datasheet - Page 5

• Manufacturer Part Number: HM-65262
• Description: 16k X 1 Asynchronous Cmos Static Ram
• Manufacturer: Intersil Corporation

Timing Waveforms
NOTE:
NOTE:
NOTE:
1. W is high for entire cycle and D is ignored. Address is stable by the time E goes low and remains valid until E goes high.
1. W is high for the entire cycle and D is ignored. E is stable prior to A becoming valid and after A becomes invalid.
1. In this mode, E rises after W. The address must remain stable whenever both E and W are low.
Q
A
Q
E
A
E
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W
Q
A
D
E
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(4) TELQX
(4) TELQX
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FIGURE 3. WRITE CYCLE 1: CONTROLLED BY W (LATE WRITE)
FIGURE 2. READ CYCLE 2: CONTROLLED BY ADDRESS
TELQX
(4)
FIGURE 1. READ CYCLE 1: CONTROLLED BY E
TAVWL
(11)
(2) TAVQV
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(3) TELQV
(15) TWLQZ
(1) TAVAX
(17) TAVWH
(9) TELWH
(8) TAVAX
HM-65262
(10) TWLWH
(13) TDVWH
6-5
(5) TEHQX
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(6) TAXQX
(12) TWHAX
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(14) TWHDX
(16) TWHQX
(7) TEHQZ
(7) TEHQZ
(7) TEHQZ