FIN1102 Fairchild Semiconductor, FIN1102 Datasheet

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FIN1102

Manufacturer Part Number
FIN1102
Description
Fin1102 Lvds 2 Port High Speed Repeater
Manufacturer
Fairchild Semiconductor
Datasheet
© 2002 Fairchild Semiconductor Corporation
FIN1102MTC
FIN1102
LVDS 2 Port High Speed Repeater
General Description
This 2 port repeater is designed for high speed intercon-
nects utilizing Low Voltage Differential Signaling (LVDS)
technology. The FIN1102 accepts and outputs LVDS levels
with a typical differential output swing of 330 mV which pro-
vides low EMI at ultra low power dissipation even at high
frequencies. The FIN1102 provides a V
coupling on the inputs. In addition the FIN1102 can also
directly accept LVPECL, HSTL, and SSTL-2 for translation
to LVDS.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pin Descriptions
Function Table
H
L
X
Z
Order Number
R
R
D
D
EN
V
GND
V
LOW Logic Level
High Impedance
HIGH Logic Level
Don't Care
IN1
IN1
OUT1
OUT1
CC
BB
Pin Name
EN
H
H
H
L
, R
, R
, D
, D
IN2
IN2
OUT2
OUT2
Inputs
D
Fail Safe Case
H
X
Package Number
IN
L
Non-inverting LVDS Input
Inverting LVDS Input
Non-inverting Driver Output
Inverting Driver Output
Driver Enable Pin for All Output
Power Supply
Ground
Reference Voltage Output
MTC14
D
H
X
IN
L
Description
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
D
BB
OUT
H
H
Z
L
reference for AC
Outputs
DS500657
D
OUT
H
L
L
Z
Features
Connection Diagram
Functional Diagram
Greater than 800 Mbps full differential path
3.3V power supply operation
3.5 ps maximum random jitter and 135 ps maximum
deterministic jitter
Wide rail-to-rail common mode range
LVDS receiver inputs accept LVPECL, HSTL, and
SSTL-2 directly
Ultra low power consumption
20 ps typical channel-to-channel skew
Power off protection
Meets or exceeds the TIA/EIA-644-A LVDS standard
14-lead TSSOP package saves space
Open circuit fail safe protection
V
BB
7 kV HBM ESD Protection
reference output
Package Description
January 2002
Revised February 2002
www.fairchildsemi.com

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FIN1102 Summary of contents

Page 1

... EMI at ultra low power dissipation even at high frequencies. The FIN1102 provides coupling on the inputs. In addition the FIN1102 can also directly accept LVPECL, HSTL, and SSTL-2 for translation to LVDS. Ordering Code: ...

Page 2

Absolute Maximum Ratings Supply Voltage ( LVDS DC Input Voltage ( LVDS DC Output Voltage (V ) OUT Driver Short Circuit Current (I ) Continuous 10 mA OSD Storage Temperature Range (T ) STG Max Junction ...

Page 3

AC Electrical Characteristics Over supply voltage and operating temperature ranges, unless otherwise specified Symbol Parameter t Differential Output Propagation Delay PLHD LOW-to-HIGH t Differential Output Propagation Delay PHLD HIGH-to-LOW t Differential Output Rise Time (20% to 80%) |V TLHD t ...

Page 4

Note A: All input pulses have frequency 10MHz Note B: C includes all probe and test fixture capacitances L FIGURE 5. Differential Driver Enable and Disable Circuit FIGURE 6. Enable and Disable AC Waveforms www.fairchildsemi.com FIGURE ...

Page 5

Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to ...

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