MSC7115 Motorola Semiconductor Products, MSC7115 Datasheet - Page 46
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MSC7115
Manufacturer Part Number
MSC7115
Description
Manufacturer
Motorola Semiconductor Products
Datasheet
1.MSC7115.pdf
(56 pages)
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Hardware Design Considerations
3.2.7
One of the most common ways to derive power is to use either a simple fixed or adjustable linear regulator. For the system I/O
voltage supply, a simple fixed 3.3 V supply can be used. However, a separate adjustable linear regulator supply for the core
voltage V
requirements.
3.3
The following equations permit estimated power usage to be calculated for individual design conditions. Overall power is
derived by totaling the power used by each of the major subsystems:
This equation combines dynamic and static power. Dynamic power is determined using the generic equation:
3.3.1
Estimation of core power is straightforward. It uses the generic dynamic power equation and assumes that the core load
capacitance is 750 pF, core voltage swing is 1.2 V, and the core frequency is 200 MHz or 266 MHz. This yields:
This equation allows for adjustments to voltage and frequency if necessary.
46
Core
Memory
Reference
I/O
where,
DDC
Supply
Estimated Power Usage Calculations
Power Supply Design
Core Power
should be implemented. For the memory power supply, regulators are available that take care of all DDR power
C = load capacitance in pF
V = peak-to-peak voltage swing in V
F = frequency in MHz
MSC7115 Low-Cost 16-bit DSP with DDR Controller Data Sheet, Rev. 11
P
TOTAL
P
P
CORE
CORE
Table 30. Recommended Power Supply Ratings
= P
= 750 pF × (1.2 V)
= 750 pF × (1.2 V)
CORE
Symbol
V
V
V
V
+ P
DDIO
DDM
DDC
REF
C × V
PERIPHERALS
2
× F × 10
2
2
× 200 MHz × 10
× 266 MHz × 10
+ P
–3
DDRIO
mW
Nominal Voltage
+ P
–3
–3
1.25 V
1.2 V
2.5 V
3.3 V
IO
= 216 mW
= 287 mW
+ P
LEAKAGE
Freescale Semiconductor
Current Rating
10 µA per device
1.5 A per device
0.5 A per device
1.0 A per device
Eqn. 3
Eqn. 4
Eqn. 5
Eqn. 6