L64777 LSI Logic Corporation, L64777 Datasheet - Page 51
L64777
Manufacturer Part Number
L64777
Description
DVB Qam Modulator
Manufacturer
LSI Logic Corporation
Datasheet
1.L64777.pdf
(124 pages)
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The host computes the following formulae to get the initial step for
phase 2, where ñ indicates the average n value.
Equation 2.3
and from this:
Equation 2.4
In the above formulae:
If the RS encoder is enabled in DVB mode and the SPI interface of
L64724 is programmed to Mode 2, the factor of sync length by valid
bytes becomes one.
In order to get an accurate initial step, the measurement must run for a
long duration. A recommended duration is 250 ms.
In general the OCLK frequency is calculated as
Above, 0 < step < 2
Start measurement by toggling the “start measurement” bit (bit 6) in the
NCO control register 14. If the NCO control register is enabled for
interrupt (through bit 2 of Register 14), an interrupt indicates completion.
Global Control and PLL Module
C1 is the reading from NM_COUNT register.
C2 is the reading from N_COUNT register.
C3 is the reading from NP_COUNT register.
n is the reading from N_PCLK register.
Sync length is the number of ICLK cycles between sync bytes (for
example, 204).
Valid bytes are the number of valid bytes during the sync interval (for
example, 188).
ld(QAMmode) is the number of bits per QAM symbol.
n ˜
initial step
=
---------------------------------------------------------------------------------------
23
C 1 n 1
1.
=
–
2
--------
C 1 C 2 C 3
n ˜
24
+
---------------------------------------- -
ld QAMmode
+
C 2 n
+
32
+
C 3 n
+
Sync length
------------------------------ -
valid bytes
1
f
OCLK
=
f
PCLK
step
----------- -
2
24
2-37
.
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