L64777 LSI Logic Corporation, L64777 Datasheet - Page 94

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L64777

Manufacturer Part Number
L64777
Description
DVB Qam Modulator
Manufacturer
LSI Logic Corporation
Datasheet
Table 6.4
6-4
No.
10
11
1
2
3
4
5
6
7
8
9
Parameter
tCYCLE
tPWH
tPWL
tI_CYCLE
tI_PWH
tI_PWL
tI_S
tI_H
tRWH
tWK
tTDLY
L64777 Preliminary Timing Parameters
Figure 6.3
DATA
The numbers in column 1 of Table 6.4 refer to the timing parameters in
the preceding figures. All parameters in this table apply for T
85 C, V
Specifications
TN
Description
Clock Cycle OCLK
Clock Pulse Width HIGH OCLK
Clock Pulse Width LOW OCLK
Clock Cycle ICLK
Clock Pulse Width HIGH ICLK
Clock Pulse Width LOW ICLK
Input Setup Time to ICLK
Input Hold to ICLK
Reset Pulse Width HIGH
Wake-up Time after RESET
(used for RAM initialization during
microprocessor configuration
access)
Delay from TN
DD
= 3.1 V to 3.6 V, and an output load of 50 pF.
L64777 Bus 3-state Delay Timing
11
1280
2560
18.5
Min
32
50
7
7
9
9
6
2
11
Max
20
ICLK cycles with
OCLK cycles
DVALIDIN =
A
HIGH
Unit
= 0 C to
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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