L64777 LSI Logic Corporation, L64777 Datasheet - Page 66

• Manufacturer Part Number: L64777
• Description: DVB Qam Modulator
• Manufacturer: LSI Logic Corporation

4.1.1 Register 0
4.1.2 Register 1
4-4
SERIN
7
7
NEWSYNC
6
FCOEFF
SERIN
NEWSYNC
EXTSYNC
PLLSET
FREQ_PHASE Frequency/Phase Compare
Register Descriptions
EXTSYNC
5
Filter Coefficient Shift
Writing to this location shifts the 196-byte filter coefficient
shift register forward by one and puts this entry at the end
of the queue. Reading this location shows the last entry
of the coefficient shift register without shifting it. The reset
values for the bit fields in this register are 0.
Serial/Parallel Input Setting
When this bit is 1, the L64777 uses DIN[0] as serial input
and considers ICLK as a bit clock. When this bit is 0, the
L64777 uses DIN[7:0] as parallel input and ICLK as a
byte clock. The reset value is 0.
NEWSYNC Insertion
When this bit is 1, the L64777 inserts a new sync word
(NEWSYNC, see Section 2.6.1) into the data stream.
When this bit is 0, the L64777 leaves the data stream
unchanged. The reset value is 1.
Synchronization Setting
When this bit is 1, the L64777 synchronizes positive
pulses on the FSTARTIN pin. When this bit is 0, the
L64777 synchronizes on SYNC_BYTE in the input
stream. The reset value is 0.
PLL Divider Setting
When this bit is 1, the L64777 forces a load of PLL
dividers. When this bit is 0, the L64777 runs the PLL
dividers normally. The reset value is 0.
When this bit is 1, the L64777 uses frequency compare
for external VCO control. When this bit is 0, the L64777
uses phase compare. The reset value is 1.
PLLSET
4
FCOEFF
FREQ_PHASE
3
2
MSIZE
R/W [7:0]
R/W 7
R/W 6
R/W 5
R/W 4
R/W 3
0
0