L64777 LSI Logic Corporation, L64777 Datasheet - Page 75
L64777
Manufacturer Part Number
L64777
Description
DVB Qam Modulator
Manufacturer
LSI Logic Corporation
Datasheet
1.L64777.pdf
(124 pages)
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4.2.4 Register 15
4.2.5 Registers 16, 17, and 18
4.2.6 Registers 19 and 20
23
15
7
FIFO_INT
TEST
INIT_STEP
NCO_GAIN
NCO-Related Registers
FIFO Interrupt
This bit enables generation of an interrupt in response to
a FIFO alarm. The reset value is 0.
Reserved Test
This register is reserved for LSI Logic production testing;
each bit field must be set to zero. The reset value is 0.
This value is the initial NCO step parameter. It is loaded
into the NCO when the most significant portion is written.
These are NCO-related register fields; they are used only
in PLL Mode. Bits 8 and 23 are reset to 0; all other bits
are reset to 1.
NCO Loop Bandwidth Adjustment
The L64777 can use this parameter to adjust the NCO
loop bandwidth. The value becomes valid on writing to
the most significant portion. These are NCO-related
register fields; they are used only in PLL Mode 2. Bit 8 is
reset to 1; all other bits are reset to 0.
NCO_GAIN
INIT_STEP
TEST
R/W [23:0]
R/W [15:0]
R/W [7:0]
R/W 0
0
0
0
4-13
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