AD9116-EBZ Analog Devices, AD9116-EBZ Datasheet - Page 15

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AD9116-EBZ

Manufacturer Part Number
AD9116-EBZ
Description
Dual, 8-/10-/12-/14-bit Low Power Digital-to-analog Converters
Manufacturer
Analog Devices
Datasheet
Table 10. AD9114 Pin Function Descriptions
Pin No.
1 to 4
5
6
7
8
9
10 to 15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Mnemonic
DB[5:2]
DVDDIO
DVSS
DVDD
DB1
DB0 (LSB)
NC
DCLKIO
CVDD
CLKIN
CVSS
CMLQ
RL1N
QOUTN
QOUTP
RL1P
AVSS
AVDD
RL2N
IOUTN
IOUTP
RLIN
CMLI
FSADJQ/AUXQ
FSADJI/AUXI
REFIO
RESET/PINMD
Description
Digital Inputs.
Digital I/O Supply Voltage (1.8 V to 3.3 V Nominal).
Digital Common.
Digital Core Supply Voltage (1.8 V to 3.3 V).
Digital Inputs.
Digital Input (LSB).
No Connect. These pins are not connected to the chip.
Data Input/Output Clock. Clock used to qualify input data.
Sampling Clock Supply Voltage (1.8 V to 3.3 V). CVDD must be ≥ DVDD.
LVCMOS Sampling Clock Input.
Sampling Clock Supply Voltage Common.
Q DAC Output Common-Mode Level.
Load Resistor (62.5 Ω) to the CMLQ Pin.
Complementary Q DAC Current Output. Full-scale current is sourced when all data bits are 0s.
Q DAC Current Output. Full-scale current is sourced when all data bits are 1s.
Load Resistor (62.5 Ω) to the CMLQ Pin.
Analog Common.
Analog Supply Voltage (1.8 V to 3.3 V).
Load Resistor (62.5 Ω) to the CMLI Pin.
Complementary I DAC Current Output. Full-scale current is sourced when all data bits are 0s.
I DAC Current Output. Full-scale current is sourced when all data bits are 1s.
Load Resistor (62.5 Ω) to the CMLI Pin.
I DAC Output Common-Mode Level.
Full-Scale Current Output Adjust for Q DAC. Connect to AVSS through a resistor.
Auxiliary Q DAC Output When Internal On-Chip, R
Full-Scale Current Output Adjust for I DAC. Connect to AVSS through a resistor.
Auxiliary I DAC Output When Internal On-Chip, R
Reference Input/Output. Serves as a reference input when the internal reference is disabled. Provides a 1.0 V
reference output when in internal reference mode (a 0.1 μF capacitor to AVSS is required).
Reset. In SPI mode, pulse RESET high to reset SPI registers to default values.
Pin Mode. A constant Logic 1 puts the device into pin mode.
NC = NO CONNECT
NOTES
1. THE HEAT SINK PAD IS CONNECTED TO AVSS AND
(LSB) DB0
MUST BE SOLDERED TO THE GROUND PLANE.
EXPOSED METAL AT PACKAGE CORNERS IS
CONNECTED TO THIS PAD.
DVDDIO
DVDD
DVSS
DB5
DB4
DB3
DB2
DB1
NC
Figure 5. AD9114 Pin Configuration
10
1
2
3
4
5
6
7
8
9
Rev. 0 | Page 15 of 48
PIN 1
INDICATOR
(Not to Scale)
AD9114
TOP VIEW
SET
SET
, is Enabled.
, is Enabled.
30 RLIN
29 IOUTP
28 IOUTN
27 RL2N
26 AVDD
25 AVSS
24 RL1P
23 QOUTP
22 QOUTN
21 RL1N
AD9114/AD9115/AD9116/AD9117

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