AD9116-EBZ Analog Devices, AD9116-EBZ Datasheet - Page 30

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AD9116-EBZ

Manufacturer Part Number
AD9116-EBZ
Description
Dual, 8-/10-/12-/14-bit Low Power Digital-to-analog Converters
Manufacturer
Analog Devices
Datasheet
AD9114/AD9115/AD9116/AD9117
THEORY OF OPERATION
Figure 75 shows a simplified block diagram of the AD9114/
AD9115/AD9116/AD9117 that consists of two main DACs,
digital control logic, and a full-scale output current control. The
DAC contains a PMOS current source array capable of providing
a maximum of 20 mA. The array is divided into 31 equal currents
that make up the five most significant bits (MSBs). The next four
bits, or middle bits, consist of 15 equal current sources whose
value is 1/16 of an MSB current source. The remaining LSBs are
binary weighted fractions of the current sources of the middle
bits. Implementing the middle and lower bits with current sources,
instead of an R-2R ladder, enhances its dynamic performance for
multitone or low amplitude signals and helps maintain the high
output impedance of the DAC (that is, >200 MΩ).
All of these current sources are switched to one or the other
of the two output nodes (I
current switches. The switches are based on the architecture
that was pioneered in the AD976x family, with further refine-
ments to reduce distortion contributed by the switching transient.
This switch architecture also reduces various timing errors and
provides matching complementary drive signals to the inputs of
the differential current switches.
DVDDIO
DVDD
DVSS
DB11
DB10
DB9
DB8
DB7
DB6
DB5
OUTP
or I
1.8V
LDO
OUTN
) via PMOS differential
INTERLEAVED
INTERFACE
1 INTO 2
INTERFACE
DATA
SPI
100µA
Figure 75. Simplified Block Diagram
I
REF
Q DATA
I DATA
BAND
1V
GAP
8.5kΩ
R
Rev. 0 | Page 30 of 48
SET
10kΩ
CLOCK
DIST
The analog and digital sections of the AD9114/AD9115/AD9116/
AD9117 have separate power supply inputs (AVDD and DVDD)
that can operate independently over a 1.7 V to 3.5 V range. The
digital section, which is capable of operating at a rate of up to
125 MSPS, consists of edge-triggered latches and segment decoding
logic circuitry. The analog section includes the PMOS current
sources, the associated differential switches, a 1.0 V band gap
voltage reference, and a reference control amplifier.
Each DAC full-scale output current is regulated by the reference
control amplifier and can be set from 4 mA to 20 mA via an exter-
nal resistor, R
The external resistor, in combination with both the reference
control amplifier and voltage reference, V
current, I
with the proper scaling factor. The full-scale current, I
32 × I
Optional on-chip R
programmed between an nominal value of 1.5 kΩ to 8.5 kΩ
(4 mA to 20 mA I
The AD9114/AD9115/AD9116/AD9117 provide the option of
setting the output common mode to a value other than ACOM
via the output common-mode pin (CMLI). This facilitates directly
interfacing the output of the AD9114/AD9115/ AD9116/AD9117
to components that require common-mode levels greater than 0 V.
AUX1DAC
AUX2DAC
REF
AD9114/AD9115/
.
AD9116/AD9117
R
8.5kΩ
REF
SET
, which is replicated to the segmented current sources
Q DAC
I DAC
SET
, connected to its full-scale adjust pin (FSADJ).
60Ω TO
60Ω TO
OUTFS
260Ω
260Ω
R
R
SET
CM
CM
).
resistors are provided that can be
62.5Ω
62.5Ω
62.5Ω
62.5Ω
RLIN
IOUTN
IOUTP
RLIP
AVDD
AVSS
RLQP
QOUTP
QOUTN
RLQN
REFIO
, sets the reference
OUTFS
, is

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