LFEC10E-3F256C Lattice Semiconductor Corp., LFEC10E-3F256C Datasheet - Page 53

• Manufacturer Part Number: LFEC10E-3F256C
• Description: Latticeecp/ec Family of Fpga Devices Has Been Optimized to Deliver Mainstream Fpga Features at Low Cost.for Maximum Performance And Value, The Latticeecp (EConomy Plus) Fpga Concept Combines an Efficient Fpgafabric With High-speed Dedicated Functions
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Register-to-Register Performance (Continued)
Derating Timing Tables
Logic Timing provided in the following sections of the data sheet and the ispLEVER design tools are worst-case
numbers in the operating range. Actual delays at nominal temperature and voltage for best-case process, can be
much better than the values given in the tables. To calculate logic timing numbers at a particular temperature and
voltage multiply the noted numbers with the derating factors provided below.
The junction temperature for the FPGA depends on the power dissipation by the device, the package thermal char-
acteristics (Θ
The user must determine this temperature and then use it to determine the derating factor based on the following
derating tables: T
Table 3-4. Delay Derating Table for Internal Blocks
DSP Function
9x9 Pipelined Multiply/Accumulate
18x18 Pipelined Multiply/Accumulate
36x36 Pipelined Multiply
1. Applies to LatticeECP devices only.
JA
Function
), and the ambient temperature, as calculated with the following equation:
J
°C.
1
Commercial
T
100
110
125
J
—
—
25
85
0
°C
1
1
Industrial
T
T
100
115
125
-40
-25
J
15
40
—
JMAX
°C
= T
AMAX
-5 Timing
1.14V
3-11
265
226
177
+ (Power * Θ
Power Supply Voltage
1.2V
JA
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
)
1.26V
Units
MHz
MHz
MHz