ADAV803 Analog Devices, ADAV803 Datasheet - Page 36

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ADAV803

Manufacturer Part Number
ADAV803
Description
Audio Codec
Manufacturer
Analog Devices
Datasheet

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ADAV803
Table 26. Receiver Buffer Configuration Register
ADDRESS = 0001011 (0x0B)
RxBCONF5
RxBCONF4
RxBCONF3
RxBCONF2–1
R
Table 27. Transmitter Control Register
ADDRESS = 0001100 (0x0C)
TxVALIDITY
TxRATIO2–0
TxCLKSEL1–0
TxENABLE
xBCONF0
RES
7
This bit is used to set or clear the VALIDITY bit in the AES3/SPDIF transmit stream.
0 = Audio is suitable for D/A conversion.
1 = Audio is not suitable for D/A conversion.
Determines the AES3/SPDIF transmitter to AES3/SPDIF receiver ratio.
000 = Transmitter to receiver ratio is 1:1.
001 = Transmitter to receiver ratio is 1:2.
010 = Transmitter to receiver ratio is 1:4.
101 = Transmitter to receiver ratio is 2:1.
110 = Transmitter to receiver ratio is 4:1.
Selects the clock source for the AES3/SPDIF transmitter.
00 = Internal Clock 1 is the cl
01 = Internal Clock 2 is the clock source for the transmitter.
10 = Recovered PLL clock is the clock sour
11 = Reserved.
Enables the AES3/SPDIF transmitter.
0 = AES
1 = AES3/SPDIF transmitter is enabled.
RES
7
If the user bits are formatted according to the IEC60958-3 standard and the DAT category is detected, the user bit
interrupt is
0 = User bit interrupt is enabled in normal mode.
1 =
This bit de
between A
0 = User bits are stored together.
1 = User bits are stored separately.
Defines the function of RxCSBINT.
0 = RxCSBINT are set when a new block of r
1 = RxCSBINT is set only if the first five bytes
status block.
Defines the user bit buffer.
00 = User bits ar
01 = Updates the second user bit buffer when the first user bit buffer is full.
10 = Formats the received user bits according to Byte 1, Bit 4 to Bit 7, of the channel status, if the PRO bit is set. If the
PRO bit is not set, formats the user bits according to the
11 = Reserved.
Defines the user bit buffer size, if RxBCONF2–1 = 01.
0 = 384 bits with Preamble Z as the sta
1 = 76
If the DAT category is detected, the user bit interrupt is enabled only if there is a change in the start (ID) bit.
8 b
3/SPDIF transmitter is disabled.
its wit
termines whether Channel A and Channel B user bits are stored in the buffer together or separated
enabled only when there is a change in the start (ID) bit.
and B.
h Pr
e ignored.
RES
6
eamble Z as the
TxVALIDITY
6
ock source for the transmitter.
RxBCON
5
st
a
Rev. 0 | Page 36 of 56
rt of the buffer.
rt of the buffer.
ce for the transmitter.
eceiver channel status is read, which is 192 audio frames.
F5
of the receiver channel status block changes from the previous channel
TxRATIO2–0
5, 4, 3
RxBCONF4
4
IEC60958-3 standard.
RxBCO
3
TxCLKSEL1–0
2, 1
NF3
RxB
2, 1
CONF2–1
TxENABLE
0
RxBCONF0
0

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