HY27UH164G2M Hynix Semiconductor, HY27UH164G2M Datasheet - Page 39

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HY27UH164G2M

Manufacturer Part Number
HY27UH164G2M
Description
(HY27xHxx4G2M Series) 4G-Bit NAND Flash Memory
Manufacturer
Hynix Semiconductor
Datasheet
5. APPENDIX : Extra Features
5.1 Automatic Page0 Read after Power Up
The timing diagram related to this operation is shown in Fig. 21
Due to this functionality the CPU can directly download the boot loader from the first page of the NAND flash, storing
it inside the internal cache and starting the execution after the download completed.
5.2 Stacked Devices Access
A small logic inside the devices allows the possibility to stack up to 4 devices in a single package without changing the
pinout of the memory. To do this the internal address register can store up to 29 addresses (512 Mbyte addressing
field) and basing on the 2 MSB pattern each device inside the package can decide if remain active (1 over 4) or “hang-
up” the connection entering the Stand-By.
5.3 Addressing for program operation
Within a block, the pages must be programmed consecutively from LSB (least significant bit) page of the block to MSB
(most significant bit) page of the block. Random address programming is prohibited. See Fig. 25.
5.4 Multiple Die Concurrent Operations and Extended Read Status
When the 1Gbit is stacked to form a 4Gbit QDP some concurrent operations (like Erase while Read, Read while write,
etc.) are available. Moreover an extended Read Status Register Feature is included to check the status of each stacked
device. In more details it is possible to run a first operation selecting the first 1Gbit, then activate a concurrent opera-
tion on the second (or third or fourth) device, checking the progression of these operations by the use of the extended
Read Status Register feature.
The command sequence to be used is shown in Table 18.
The result is the typical Read Status Pattern.
Rev 0.1 / Feb. 2005
Read Status 1st device
Read Status 2nd device (0x07FFFFFF <AX<= 0x0FFFFFFF)
Read Status 3rd device (0x0FFFFFFF <AX<= 0x17FFFFFF)
Read Status 4th device (0x17FFFFFF <AX<= 0x1FFFFFFF)
Table 18: Extended Read Status Register Commands
FUNCTION
4Gbit (512Mx8bit / 256Mx16bit) NAND Flash
(AX<= 0x07FFFFFF)
HY27UH(08/16)4G2M Series
HY27SH(08/16)4G2M Series
COMMAND
Preliminary
73h
74h
75h
72h
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