SCAN182245ASSC Fairchild Semiconductor, SCAN182245ASSC Datasheet
SCAN182245ASSC
Specifications of SCAN182245ASSC
Related parts for SCAN182245ASSC
SCAN182245ASSC Summary of contents
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... Test Data Input (TDI), Test Data Out (TDO), Test Mode Select (TMS), and Test Clock (TCK). Ordering Code: Package Order Number Number SCAN182245ASSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide SCAN182245AMTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “ ...
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Truth Tables Inputs A1 (0–8) G1 DIR1 (Note HIGH Voltage Level L LOW Voltage Level Note 1: Inactive-to-Active transition must occur to enable ...
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Description of BOUNDARY-SCAN Circuitry The scan cells used in the BOUNDARY-SCAN register are one of the following two types depending upon their loca- tion. Scan cell TYPE1 is intended to solely observe system data, while TYPE2 has the additional ability ...
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Description of BOUNDARY-SCAN Circuitry Scan Chain Definition (80 Bits in Length) www.fairchildsemi.com (Continued) BOUNDARY-SCAN Register 4 ...
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Description of BOUNDARY-SCAN Circuitry Input BOUNDARY-SCAN Register Scan Chain Definition (40 Bits in Length) (Continued) When Sample In is Active 5 www.fairchildsemi.com ...
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Description of BOUNDARY-SCAN Circuitry Scan Chain Definition (40 Bits in Length) When Sample Out and EXTEST-Out are Active www.fairchildsemi.com (Continued) Output BOUNDARY-SCAN Register 6 ...
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Description of BOUNDARY-SCAN Circuitry BOUNDARY-SCAN Register Definition Index Bit No. Pin Name Pin No. Pin Type Scan Cell Type 79 DIR1 3 Input TYPE1 Input TYPE1 77 AOE Internal TYPE2 1 76 BOE Internal TYPE2 1 75 ...
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SCAN ABT Live Insertion and Power Cycling Characteristics SCAN ABT is intended to serve in Live Insertion backplane applications. It provides 2nd Level Isolation cates that while external circuitry to control the output enable pin is unnecessary, there may be ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 3) Input Current (Note 5.0 mA Voltage Applied to Any Output in the ...
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AC Electrical Characteristics Normal Operation: Symbol Parameter t Propagation Delay PLH t PHL Disable Time PLZ t PHZ t Enable Time PZL t PZH Note 5: Voltage Range 5.0V 0.5V AC Electrical Characteristics ...
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AC Operating Requirements Scan Test Operation Symbol Parameter t Setup Time S Data to TCK (Note 8) t Hold Time H Data to TCK (Note 8) t Setup Time G1 TCK (Note 9) t ...
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Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide www.fairchildsemi.com Package Number MS56A 12 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...