MT58L64V36P Micron Semiconductor, MT58L64V36P Datasheet - Page 14
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MT58L64V36P
Manufacturer Part Number
MT58L64V36P
Description
(MT58LxxxxP) 2Mb SRAM
Manufacturer
Micron Semiconductor
Datasheet
1.MT58L64V36P.pdf
(20 pages)
NOT RECOMENDED FOR NEW DESIGNS
3.3V I/O AC TEST CONDITIONS
LOAD DERATING CURVES
SyncBurst SRAM timing is dependent upon the capaci-
tive loading on the outputs.
voltage curves.
2Mb: 128K x 18, 64K x 32/36 Pipelined, SCD SyncBurst SRAM
MT58L128L18P_C.p65 – Rev. C, Pub. 11/02
Input pulse levels ................. V
Input rise and fall times .................................... 1ns
Input timing reference levels ..................... V
Output reference levels ........................... V
Output load ........................... See Figures 1 and 2
The Micron 128K x 18, 64K x 32, and 64K x 36
Consult the factory for copies of I/O current versus
3.3V I/O Output Load Equivalents
Q
Q
351
Z = 50Ω
................... V
O
Figure 1
Figure 2
+3.3V
V = 1.5V
IH
T
IL
317
5pF
= (V
= (V
50Ω
DD
DD
/2.2) + 1.5V
/2.2) - 1.5V
DD
DD
Q/2.2
/2.2
14
PIPELINED, SCD SYNCBURST SRAM
2.5V I/O AC TEST CONDITIONS
Input pulse levels ............. V
Input rise and fall times .................................... 1ns
Input timing reference levels ................... V
Output reference levels .............................. V
Output load ........................... See Figures 3 and 4
2.5V I/O Output Load Equivalents
2Mb: 128K x 18, 64K x 32/36
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Q
Q
225Ω
............... V
Z = 50Ω
Figure 3
Figure 4
O
+2.5V
IH
IL
V = 1.25V
= (V
= (V
T
225Ω
5pF
DD
DD
/2.64) + 1.25V
50Ω
/2.64) - 1.25V
©2002, Micron Technology, Inc.
DD
DD
/2.64
Q/2