MT90812 Mitel Networks Corporation, MT90812 Datasheet - Page 16

• Manufacturer Part Number: MT90812
• Description: Integrated Digital Switch (IDX)
• Manufacturer: Mitel Networks Corporation

MT90812
5.0
The MT90812 memory is accessed via the microport. The microport can operate in multiplexed or non-
multiplexed mode as described in “Microprocessor Port” on page 49 The access to the MT90812 memory for
multiplexed and non-multiplexed mode is described below.
5.1
The MT90812 memory is divided into 7 pages, as listed in Table 1.
In multiplexed mode, the Memory Select bits in the Address Memory Select register (AMS) determine the page
that is addressed. In non-multiplexed mode, the external address bits A9,A8,A7, determine the page that is
addressed, eliminating the need to access the AMS register for memory page select.
The control registers, described in “Detailed Register Descriptions” on page 52, consist of one page of 128
locations. In multiplexed mode the control registers are accessed independent of the setting of the memory
select bits in the AMS register, by setting the external address bit A7 to low. In non-multiplexed model the
control registers are accessed by setting address bits A9, A8, and A7 to High. The control register at
location 61
The addressing of the other blocks and memory pages are described below. Each Data and Connect Memory
page consists of 128 locations, as shown in Table 2.
5.1.1
An MT90812 memory address, in multiplexed microport mode, consists of two portions. The higher order
bits(3) originate from the Control Address Memory Select (AMS) register, which may be written to or read from
via the Control Interface. The Control Interface receives address information at A7 to A0, data information at
D7 to D0 and handles the microprocessor control signals CS, DTA, R/W and DS. The lower order bits(8)
originate from the address lines directly. The address lines A6-A0, on the Control Interface, give access to the
MT90812 registers directly if A7 is zero, or depending on the contents of AMS register, to the High or Low
sections of the Connection Memory, or to the Data Memory.
5.1.2
A MT90812 memory address, in non-multiplexed microport mode, consists of A9 to A0. The higher order
bits(3) originating from the external address bits A9,A8,A7, control which page is accessed. The Control
Interface receives address information at A9 to A0, data information at D7 to D0 and handles the
microprocessor control signals CS, DTA, R/W and DS. The lower order bits(7) originating from the external
12
Non-Multiplexed Mode
External Address
Address Memory Map
Memory Page Select
A9,A8,A7
Addressing Memory Pages in Multiplexed Microport Mode
Addressing Memory Pages in Non-Multiplexed Microport Mode.
111
000
001
010
011
100
101
H
( 3E1
H
in motorola non-muxed, 061
Memory Select Bits
Table 1 - MT90812 Memory Page Select
XXX
000
001
010
011
100
101
Multiplexed Mode
External Address A7
H
in in multiplexed mode) must be initialized to 080
0
1
1
1
1
1
1
Control Registers (Section 22.0)
Local Data Memory
Expansion Data Memory
Local Connect Memory Low
Expansion Connect Memory Low
Local Connect Memory High
Expansion Connect Memory High
Advance Information
Memory Pages
H
.