MT90812 Mitel Networks Corporation, MT90812 Datasheet - Page 39

• Manufacturer Part Number: MT90812
• Description: Integrated Digital Switch (IDX)
• Manufacturer: Mitel Networks Corporation

Advance Information
•
Refer to the HDLC control and status registers starting on page 70. Refer to MSAN-178 note for a
programming example for the HRA.
13.1
The HRA provides the capability to multiplex the HDLC controller over a maximum of 16 channels of the STo1
link. Signalling information can be passed to and from the far end through the 8, 16, or 64 kb/s D-channels. The
microprocessor uses the MT8952 to send and receive the signalling information in the HDLC protocol. To send
information, the microprocessor writes to the HDLC transmit buffer. The message will then be sent out 1,2, or 8
bits per channel to the far end. Messages from the peripherals can be received through the RX and the Auto-
hunt blocks of the HRA.
The HRA is used to specify which channel, and hence which of the DNICs, the message is intended. The HRA
allows the transmit and receive sections of the MT8952 to act independently. When the microprocessor is
transmitting to one peripheral it may receive from another simultaneously. To specify the receive and transmit
channels the channel number is written to the DRX4-1 bits in HRA CTRL Register 2 (HC2) and NTX4-1 bits in
HRA CTRL Register 3 (HC3). The channel number for the RX circuit may also be supplied from the Auto-hunt
circuit of the HRA. The Auto-hunt circuit supplies the channel number when the RX circuit is in multiplexed
mode. When in dedicated mode the channel number is supplied by a system write to the DRX4-1 bits in HRA
CTRL Register 2 (HC2).
When in multiplexed mode the HRA supports polling of the peripherals. In this mode, sharing of the single
HDLC amongst several peripherals (i.e. MT9171/72 DNIC devices) is simplified through the use of the Auto-
hunt circuit. When it is necessary for a peripheral to send a message to the central processor, the peripheral
continually sends a “Request-to-Send” (RTS) message. The Auto-hunt block in the HRA monitors each
incoming channel in turn and checks for a RTS message. Upon detection of a RTS from the peripheral the HRA
latches the channel number to be used as the next receive channel by the RX circuit of the HRA.
The Auto-hunt circuit functions independently of the TX and RX circuits, thereby reducing the workload
demanded of the MT8952 HDLC controller. There is some handshaking that is required between the TX, RX
and Auto-hunt blocks and will be described further in the next sections.
13.2
Fig. 24 shows a typical application of the MT90812 connected to a MT8952 HDLC Protocol Controller and
several MT9171/72 DNICs. Placing the MT8952B in the External Timing mode and the DNICs in the dual-port
digital-network mode allows for easy interface through the HRA block.
13.2.1
The multiplex timing for the HDLC-channel is performed by the HRA block. The MT8952B transmit and receive
sections, in External Timing mode, are independently controlled by the hardware pins TxCEN and RxCEN,
respectively. To assist in multiplexing, the MT8952B outputs TEOP and REOP indicate when it has finished
transmitting or receiving a packet.
The TxCEN and RxCEN clock enable strobes are generated by the HRA during the specified-channel and bit
times to allow the HDLC controller to transmit to, and receive from, any channel.
• Dedicated Receive Mode
• Multiplexed Receive Mode
• CTS Generation
• Receive Packet Termination
• Auto-hunt Monitoring
• Circumstances When Monitoring a Channel is Stopped
RX Channel Auto-hunt
General Description of MT90812 and Shared HDLC Configuration
Connection to MT8952 HDLC Controller and MT9171/72B DNIC
Connection to MT8952B HDLC Controller
MT90812
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