MT90812 Mitel Networks Corporation, MT90812 Datasheet - Page 75

• Manufacturer Part Number: MT90812
• Description: Integrated Digital Switch (IDX)
• Manufacturer: Mitel Networks Corporation

Advance Information
22.28 HRA CTRL Register 2 (HC2)
The register is configured as follows:
Read/Write Address is: 51
Reset Value is: 00
3-0
Bit
7
6
5
4
SREOP
DRX4-1
RECTS
STEOP
Name
DDRX
SREOP
7
H
Software Controlled RX End Of Packet (SREOP). The system can at any time inject a
receive end-of-packet by setting this bit. When RX circuitry uses this bit, SREOP will be
automatically cleared. SREOP has exactly the same effect and internal timing as REOP. On
reset, this bit is cleared.
Re-initiate Clear To Send (RECTS). By setting this bit, the system can initiate another “go-
ahead” flag to the peripheral currently enabled for transmission to the system. This is used
when the CTS, which is automatically generated upon receive channel selection, is not
detected at the peripheral. RECTS is used with the same internal timing as the normal
source of CTS initiation. When RECTS has been used by the RX circuitry it is automatically
cleared. A RECTS request will be accepted only if the receiver is active; the request will be
ignored, and the RECTS bit cleared, if the receiver is inactive. On reset, this bit is cleared.
Software Controlled TX End Of Packet (STEOP). The system can at any time inject a
transmit end-of-packet by setting this bit. When the TX circuitry uses this bit, STEOP will be
automatically cleared. STEOP has exactly the same effect and internal timing as TEOP. On
reset, this bit is cleared.
Dedicated RX Control. This bit when high enables dedicated reception from the channel
selected by the DRXi bits. At the same time, the generation of CTS is disabled, and flags
generated by the Auto-hunt circuitry are ignored. RXCHNL and RXACT are held high in
dedicated receive mode. If this bit is low, normal RX operation is enabled. On reset, this bit
is cleared.
Dedicated RX Channel Number. If the DDRX bit or the PRXSEL bit is high, then these bits
control the selection of the current receive channel, overriding the output of the Auto-hunt
circuitry. The RX Channel Number selects one of the first 16 timeslots of STi1, with HC1
register bit CD=0, or the last 16 timeslots with bit CD=1. DRX4 is the MSB and DRX1 is the
LSB. On reset, these bits are cleared.
RECTS
H
6
STEOP
5
DDRX
4
DRX4
3
Description
DRX3
2
DRX2
1
DRX1
0
MT90812
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