S2078TB Applied Micro Circuits Corporation, S2078TB Datasheet

S2078TB

Manufacturer Part Number

S2078TB

Description

DUAL FIBRE CHANNEL TRANSCEIVER

Manufacturer

Applied Micro Circuits Corporation

Datasheet

1.S2078TB.pdf (24 pages)

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FEATURES

APPLICATIONS

Figure 1. Typical Dual Fibre Channel Application

DEVICE

SPECIFICATION

October 13, 2000 / Revision D

DUAL FIBRE CHANNEL TRANSCEIVER

• Functionally compliant with ANSI X3T11 Fibre

• 1062 MHz (Fibre Channel) operating rate

• Dual Transmitter incorporating phase-locked

• Dual Receiver PLL provides clock and data

• Internally Series terminated TTL outputs

• Low-jitter serial PECL interface

• Local Loopback

• Interfaces with coax, twinax, or fiber optics

• Single +3.3V supply, 1.33 W power dissipation

• Compact 21mm x 21mm 156 TBGA package

• Switched networks

• Data broadcast environments

• Fibre Channel Switches

High-speed data communications

Channel physical and transmission protocol

standards

- Half rate operation

loop (PLL) clock synthesis from low speed

reference

recovery

INTERFACE

CHANNEL

FIBRE

DUAL

FC INTERFACE

S2078

GENERAL DESCRIPTION

The S2078 dual transmitter and receiver chip is de-

signed to provide two channels of high-speed serial

data transmission over fiber optic or copper interfaces

conforming to the requirements of the ANSI X3T11

Fibre Channel specification. The chip runs at 1062.5

Mbps serial data rate with an associated 10-bit paral-

lel data word. The chip provides two separate receive

PLLs which can be operated asyncronously.

Each bi-directional channel provides parallel-to-se-

rial and serial-to-parallel conversion, clock genera-

tion and recovery, and framing. The on-chip transmit

PLL synthesizes the high-speed clock from a low-

speed reference. The on-chip dual receive PLL is

used for clock recovery and data re-timing on the

two independent data inputs. The transmitter and re-

ceiver each support differential PECL-compatible I/O

for copper or fiber optic component interfaces and

provide excellent signal integrity. Local loopback

mode allows for system diagnostics. The chip re-

quires a 3.3V power supply and dissipates 1.33

watts.

Figure 1 shows the use of the S2062 and S2078 in a

Fibre Channel application. Figure 2 summarizes the

input/output signals of the device. Figures 3 and 4

show the transmit and receive block diagrams, re-

spectively.

MAC

(ASIC)

MAC

(ASIC)

SERIAL BP DRIVER

S2062

TO SERIAL

BACKPLANE

S2078

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