IDT88P8344 Integrated Device Technology, IDT88P8344 Datasheet - Page 14

• Manufacturer Part Number: IDT88P8344
• Description: Spi Exchange 4 X Spi-3 To Spi-4 Issue 1.0
• Manufacturer: Integrated Device Technology

SPI-3 ingress Link mode
SPI-3 ingress PHY mode
by proper response to either Link layer polling (packet mode ) or direct indication
on DTPA signals (byte mode). The selection is made by the PACKET flag in
the SPI-3 configuration register.
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4


Refer to [Glossary] for details about the SPI-3 interface.
The SPI Exchange indicates to the Link layer it has buffer space available
The PHY pushes data into the device in blocks from 1 up to 256 bytes.
The SPI Exchange provides backpressure for the SPI-3 ingress physical
interface by the I_ENB signal. The I_ENB is asserted when at least one
LINK
PHY
Figure 3. Link mode SPI-3 ingress interface
Figure 4. PHY mode SPI-3 ingress interface
I_FCLK
I_ERR
I_Data[31:0]
I_PRTY
RVAL
I_SOP
I_EOP
I_RSX
I_MOD[1:0]
I_ENB
I_FCLK
DTPA[3:0]
STPA
PTPA
ADDR[7:0]
I_ERR
I_Data[31:0]
I_PRTY
I_SOP
I_EOP
I_RSX
I_MOD[1:0]
I_ENB
14
(register_offset = 0x01). When the flag is cleared the I_ENB signal will not be
asserted, hence no backpressure can be generated.


active LID can not accept data. This feature is enabled by the
BACKPRESSURE_EN flag in the SPI-3 ingress configuration register
In packet mode the device responds to polling (by Link layer device)
In byte mode the direct status indication is limited to 4 addresses (fixed ports
[3:0])
(LINK MODE)
(PHY MODE)
IDT88P8344
IDT88P8344
byte mode
packet mode
6370 drw25
6370 drw26
INDUSTRIAL TEMPERATURE RANGE
APRIL 10, 2006