IDT88P8344 Integrated Device Technology, IDT88P8344 Datasheet - Page 78

• Manufacturer Part Number: IDT88P8344
• Description: Spi Exchange 4 X Spi-3 To Spi-4 Issue 1.0
• Manufacturer: Integrated Device Technology

General purpose I/O (Block_base 0x0900 +
Register_offset 0x20)
controlled by the DIR_OUT field in the GPIO register. The logical level on a GPIO
pin is controlled by the LEVEL field in the GPIO register if DIR_OUT=1
(pin=output), or sensed if DIR_OUT=0 (pin=input). Optionally, the LEVEL bit
can monitor the logic level of any bit selected from the indirect access space if
MONITOR_EN is set high. With MONITOR_EN set high, bits in the indirect
access space can be selected for monitoring by the ADDRESS and BIT fields
in the GPIO monitor table.
0x0900 and have read and write access.
an output
an output
an output
GPIO pin. GPIO pins used as monitors must also be configured to be outputs.
All GPIO pins must be used as either monitors or as normal I/O; no mixing of
the monitoring function and the normal I/O function is permitted.
GPIO monitor table (Block_base 0x0900 +
Register_offset 0x21 - 0x25)
ADDRESS and BIT fields in the GPIO monitor table.
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
DIR_OUT
Reserved
LEVEL
Reserved
MONITOR_EN
ADDRESS
Reserved
BIT
Reserved
Five general purpose I/O pins are provided. Each pin I/O direction is
The general purpose I/O registers are at common module Block_base
DIR_OUT[4:0] Used for configuring each GPIO pin as either an input or
0=GPIO pin is an input
1=GPIO pin is an output
LEVEL[4:0]
0=GPIO pin is sensed as a logic zero if an input , or driven to a logic zero if
1=GPIO pin is sensed as a logic one if an input , or driven to a logic one if
MONITOR_EN [4:0] Used for enabling the monitor output function for each
0=GPIO pin is used as an I/O pin
1=GPIO pin is used as a monitor pin
A bit in the indirect access space can be selected for monitoring by the
Field
Field
Used for sensing or driving each GPIO pin
15:0
23:16
28:24
31:29
15:13
20:16
Bits
12:8
Bits
4:0
7:5
Length
Length
16
3
5
3
5
8
5
3
5
Initial Value
0x0000
0x00
0x00
0x0
0x00
0x0
0x00
0x0
0x00
Initial
Value
78
Block_base 0x0900 + Register_offset 0x21 = 0x8921.
Block_base 0x0900 + Register_offset 0x22 = 0x8922.
Block_base 0x0900 + Register_offset 0x23 = 0x8923.
Block_base 0x0900 + Register_offset 0x24 = 0x8924.
Block_base 0x0900 + Register_offset 0x25 = 0x8925.
the GPIO pins are put into monitor mode.
monitor mode.
Version number register (common module
Block_base 0x0900 + Register_offset 0x30)
Common_module 0x8000 + Block_base 0x0900 + Register_offset 0x30 =
0x8930 in the indirect register access space. The version number register
contains hard-coded values that can be read to verify the microprocessor read
path is correct, and that the correct part is installed.
The GPIO Monitor Table for GPIO[0] is at Common_Module 0x8000+
The GPIO Monitor Table for GPIO[1] is at Common_Module 0x8000+
The GPIO Monitor Table for GPIO[2] is at Common_Module 0x8000+
The GPIO Monitor Table for GPIO[3] is at Common_Module 0x8000+
The GPIO Monitor Table for GPIO[4] is at Common_Module 0x8000+
ADDRESS[15:0]
BIT[4:0]
The version number register is a read-only sixteen-bit register at
VERSION
ID
Version
ID
Field
BIT[4:0]=0x00 selects data bit 0.
…
BIT[4:0]=0x1F selects data bit 31.
Used for selecting the register bit (1 of 32) for a GPIO put into
The hardware version is read from this field.
The hardware identification is read from this field.
Used for configuring the indirect address select when
Bits
15:8
7:0
INDUSTRIAL TEMPERATURE RANGE
Length
8
8
APRIL 10, 2006
Initial Value
0xF9
0x01