IDT88P8344 Integrated Device Technology, IDT88P8344 Datasheet - Page 70

• Manufacturer Part Number: IDT88P8344
• Description: Spi Exchange 4 X Spi-3 To Spi-4 Issue 1.0
• Manufacturer: Integrated Device Technology

path is disabled during reset and while configuring the port, and then is enabled
for normal use.
is selected using the I_CLK_EDGE field.
during de-skew.
(recommended setting)
is controlled using the I_INSYNC_THR field. It is recommended to use the initial
value.
threshold is controlled using the I_OUTSYNC_THR field. It is recommended to
use the initial value.
switching of the active calendars. It is recommended to use the initial value.
calendar_0 and SPI-4 ingress calendar_1. The CAL_SEL bit is only valid if the
I_CSW_EN bit is set to a logic one.
SPI-4 ingress status configuration register
(Block_base 0x0300 + Register_offset 0x01)
has read and write access.
SPI-4 ingress FIFO status path interface. The bit fields of the SPI-4 ingress status
configuration register are described.
IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4
SPI-4_EN The SPI-4 ingress path is enabled using this field. The SPI-4
I_CLK_EDGE
I_DSC
I_INSYNC_THR
I_OUTSYNC_THR The SPI-4 ingress DIP-4 out-of synchronization
I_CSW_EN The ingress calendar switch enable bit is used to enable the
CAL_SEL
I_LOW
The SPI-4 ingress status configuration register is at Block_base 0x0300 and
The SPI-4 ingress status configuration register is used to set the state of the
FIFO_MAX_T
ALPHA_FIFO
Field
0=SPI-4 ingress is disabled
1= SPI-4 ingress is enabled
0=SPI-4 ingress LVTTL status clock uses the rising edge
1= SPI-4 ingress LVTTL status clock uses the falling edge
0= One de-skew result is needed for data de-skew
1= Two consecutive de-skew results are needed for data de-skew
0=Ingress calendar switch disabled. Only SPI-4 ingress calendar_0
is used.
1=Ingress calendar switch enabled. Calendar_0 or calendar_1 can
be used.
0=SPI-4 ingress calendar_0 is selected
1=SPI-4 ingress calendar_1 is selected if the I_CSW_EN bit is set to
a logic one
0=SPI-4 ingress clock is greater than or equal to 200 MHz
1=SPI-4 ingress clock is less than 200 MHz
The I_DSC bit is used to protect against a random data error
The I_LOW field selects the SPI-4 ingress clock frequency range.
The calendar select bit selects between SPI-4 ingress
The SPI-4 ingress LVTTL status clock active clock edge
The SPI-4 ingress DIP-4 in synchronization threshold
31:24
Bits
23:0
Length
24
8
Initial Value
0
0
70
interval between scheduling of training sequences on the FIFO status path
interface. The units are the number of times the calendar is sent before
scheduling the training sequence.
repetitions of the status training sequence that must be scheduled every
FIFO_MAX_T cycles. The value for alpha used is actually one more than the
ALPHA_FIFO value programmed into the ALPHA_FIFO field.
SPI-4 ingress status register (Block_base 0x0300 +
Register_offset 0x02)
access.
synchronization.
tion state of the SPI-4 ingress data path.
state of the SPI-4 ingress data path.
state of the SPI-4 ingress clock.
SPI-4 ingress inactive transfer port (Block_base
0x0300 + Register_offset 0x03)
read-only access.
the LP associated with the latest inactive transfer. The INACT_LP field can
change at any time and is used for diagnostics only.
of the LP associated with the last inactive LP transfer, used for diagnostics only.
I_SYNCH
I_DSK_OOR
DCLK_AV
FIFO_MAX_T
ALPHA_FIFO
The SPI-4 ingress status register is at Block_base 0x0300 and has read-only
The SPI-4 ingress status register is used to set the state of the SPI-4 ingress
The bit fields of the SPI-4 ingress status register are described.
I_SYNCH The SPI-4 ingress I_SYNCH field describes the synchroniza-
I_DSK_OOR The SPI-4 ingress I_DSK_OOR field describes the de-skew
DCLK_AV The SPI-4 ingress DCLK_AV field describes the availability
The SPI-4 ingress inactive transfer port is at Block_base 0x0300 and has
The SPI-4 ingress inactive transfer port INACT_LP field is used to monitor
INACT_LP The SPI-4 ingress INACT_LP field contains the numeric value
INACT_LP
Field
Field
0=SPI-4 ingress data path is out of synchronization
1=SPI-4 ingress data path is in synchronization
0=SPI-4 ingress data path de-skew is within range
1= SPI-4 ingress data path de-skew is out of range
0=SPI-4 ingress clock is not available
1= SPI-4 ingress clock is available
The SPI-4 ingress FIFO_MAX_T field is the maximum time
The SPI-4 ingress ALPHA_FIFO field is the number of
Bits
Bits
7:0
INDUSTRIAL TEMPERATURE RANGE
0
1
2
Length
Length
1
1
1
8
APRIL 10, 2006
Initial Value
Initial Value
0
0
0
0