IDT72V36100L15PFI IDT, Integrated Device Technology Inc, IDT72V36100L15PFI Datasheet - Page 9

• Manufacturer Part Number: IDT72V36100L15PFI
• Description: IC FIFO SYNC II 36BIT 128-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Vr

Specifications of IDT72V36100L15PFI

• Function: Synchronous
• Memory Size: 2.3K (64 x 36)
• Data Rate: 166MHz
• Access Time: 15ns
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Configuration: Dual
• Density: 2.25Mb
• Access Time (max): 10ns
• Word Size: 36b
• Organization: 64Kx36
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: TQFP
• Clock Freq (max): 66.7MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.45V
• Supply Current: 40mA
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V36100L15PFI; 800-1529

NOTES:
1. All AC timings apply to both Standard IDT mode and First Word Fall Through mode.
2. Industrial temperature range product for the 7-5ns and 15ns are available as a standard device. All other speed grades are available by special order.
3. Pulse widths less than minimum values are not allowed.
4. Values guaranteed by design, not currently tested.
5. TQFP package only: for speed grades 7-5ns, 10ns and 15ns the minimum for t
IDT72V36100/72V36110 3.3V HIGH DENSITY SUPERSYNC II
65,536 x 36 and 131,072 x 36
AC ELECTRICAL CHARACTERISTICS
(Commercial: V
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
S
A
CLK
CLKH
DS
DH
ENH
LDS
LDH
RS
RSR
CLKL
ENS
RSS
RSF
RTS
OLZ
OE
OHZ
WFF
REF
PAFA
PAFS
PAEA
PAES
HF
SKEW1
SKEW2
Clock Cycle Frequency
Data Access Time
Clock Cycle Time
Clock High Time
Clock Low Time
Data Setup Time
Data Hold Time
Enable Setup Time
Enable Hold Time
Load Setup Time
Load Hold Time
Reset Pulse Width
Reset Setup Time
Reset Recovery Time
Reset to Flag and Output Time
Retransmit Setup Time
Output Enable to Output in Low Z
Output Enable to Output Valid
Output Enable to Output in High Z
Write Clock to FF or IR
Read Clock to EF or OR
Clock to Asynchronous Programmable Almost-Full Flag
Write Clock to Synchronous Programmable Almost-Full Flag
Clock to Asynchronous Programmable Almost-Empty Flag
Read Clock to Synchronous Programmable Almost-Empty Flag
Clock to HF
Skew time between RCLK and WCLK for EF/OR and FF/IR
Skew time between RCLK and WCLK for PAE and PAF
CC
= 3.3V ± 0.15V, T
(5)
(3)
Parameter
A
(5)
= 0°C to +70°C; Industrial: V
(4)
(4,5)
TM
36-BIT FIFO
CC
= 3.3V ± 0.15V, T
(1)
A
PBGA & TQFP
IDT72V36100L6
IDT72V36110L6
Min.
, t
Commercial
2.7
2.7
0.5
0.5
0.5
—
10
15
10
—
—
—
—
—
—
—
—
1
6
2
2
3
3
0
1
1
4
5
OE
9
, and t
Max.
166
OHZ
—
—
—
—
—
—
—
—
—
—
—
—
15
—
—
10
10
10
—
—
4
4
4
4
4
4
4
is 2ns.
A
IDT72V36100L7-5 IDT72V36100L10
IDT72V36110L7-5 IDT72V36110L10
Com’l & Ind’l
PBGA & TQFP
= -40°C to +85°C; JEDEC JESD8-A compliant)
Min.
1
7.5
3.5
3.5
2.5
0.5
2.5
0.5
3.5
0.5
3.5
1
1
—
10
15
10
—
—
—
—
—
—
—
—
0
5
7
(5)
(5)
(5)
133.3
Max.
12.5
12.5
12.5
—
—
—
—
—
—
—
—
—
—
—
—
15
—
—
—
—
5
6
6
5
5
5
5
(2)
Min.
1
4.5
4.5
3.5
0.5
3.5
0.5
3.5
0.5
3.5
1
1
10
10
15
10
—
—
—
—
—
—
—
—
10
—
Commercial
TQFP Only
0
7
(5)
(5)
(5)
COMMERCIAL AND INDUSTRIAL
Max.
100
6.5
6.5
6.5
6.5
6.5
—
—
—
—
—
—
—
—
—
—
—
—
15
—
—
16
16
16
—
—
6
6
TEMPERATURE RANGES
IDT72V36100L15
IDT72V36110L15
Com’l & Ind’l
Min.
1
1
1
—
15
15
15
15
—
—
—
—
—
—
—
—
14
OCTOBER 22, 2008
TQFP Only
6
6
4
1
4
1
4
1
4
0
9
(5)
(5)
(5)
66.7
Max.
10
—
—
—
—
—
—
—
—
—
—
—
—
15
—
—
10
10
20
10
20
10
20
—
—
8
8
(2)
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns