74HCT7403D,512 NXP Semiconductors, 74HCT7403D,512 Datasheet - Page 14

IC FIFO REGISTER 64X4 3ST 16SOIC

74HCT7403D,512

Manufacturer Part Number
74HCT7403D,512
Description
IC FIFO REGISTER 64X4 3ST 16SOIC
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheet

Specifications of 74HCT7403D,512

Function
Asynchronous, Synchronous
Memory Size
256 (64 x 4)
Data Rate
15MHz
Voltage - Supply
4.5 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Logic Family
HCT
Logical Function
FIFO Register
Number Of Elements
1
Number Of Bits
4
Number Of Inputs
4
Number Of Outputs
4
High Level Output Current
-8mA
Low Level Output Current
8mA
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Output Type
3-State
Polarity
Non-Inverting
Technology
CMOS
Mounting
Surface Mount
Pin Count
16
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Quiescent Current
50uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Access Time
-
Lead Free Status / Rohs Status
Compliant
Other names
74HCT7403D
74HCT7403D
933999390512
Philips Semiconductors
Master reset applied with FIFO full
Notes to Fig.8
1. DIR LOW, output ready HIGH; assume FIFO is full
2. MR pulse LOW; clears FIFO
3. DIR goes HIGH; flag indicates input prepared for valid data
4. DOR goes LOW; flag indicates FIFO empty
5. Q
September 1993
4-Bit x 64-word FIFO register; 3-state
(1) HC : V
Fig.8 Waveforms showing the MR input to DIR, DOR and Q
n
HCT: V
outputs go LOW (only last bit will be reset).
M
M
= 50%; V
= 1.3 V; V
I
= GND to V
I
= GND to 3 V.
CC
.
handbook, halfpage
DIR OUTPUT
DOR OUTPUT
MR INPUT
Q n OUTPUT
2
1
14
t PLH
t PHL
t PHL
V M
n
(1)
output propagation delays and the MR pulse width.
t
W
3
4
V M
V M
5
(1)
(1)
MGA668
74HC/HCT7403
Product specification

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